Staircase formation in three-dimensional memory device
AssigneeYangtze Memory Technologies Co., Ltd.
InventorYu Ting ZHOU
Life of this patent
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Abstract
A method for forming a staircase structure of 3D memory, including: forming an alternating layer stack comprising a plurality of dielectric layer pairs disposed over a substrate; forming a first mask stack over the alternating layer stack; patterning the first mask stack to define a staircase region comprising a number of N sub-staircase regions over the alternating layer stack using a lithography process and N is greater than 1; forming a first staircase structure over the staircase region, the first staircase structure has a number of M steps at each of the staircase regions and M is greater than 1; and forming a second staircase structure on the first staircase structure, the second staircase structure has a number of 2*N*M steps at the staircase region.
Claims20
A method for forming a 3D memory device, comprising:
- forming an alternating layer stack comprising a plurality of dielectric layer pairs;
- forming a staircase region comprising a number of N sub-staircase regions over the alternating layer stack, wherein N is greater than 1;
- forming a first staircase structure over the staircase region, the first staircase structure having a number of M steps at each of the sub-staircase regions, wherein M is greater than 1;
- and
- forming a second staircase structure on the first staircase structure, wherein
- the second staircase structure has a number of 2*N*M steps at the staircase region;
- and
- each sub-staircase region has a number of 2*M steps, each of the 2*M steps corresponding to a different dielectric layer pair.
A method for forming a 3D memory device, comprising:
- forming a plurality of dielectric layer pairs, wherein each dielectric layer pair comprises a sacrificial layer and an insulating layer;
- forming a first staircase structure in a staircase region, wherein:
- the staircase region comprises N number of sub-staircase regions;
- and
- the first staircase structure exposes portions of M number of dielectric layer pairs in each sub-staircase region;
- and
- forming a second staircase structure in the staircase region, wherein:
- the second staircase structure exposes portions of 2*N*M number of dielectric layer pairs;
- and
- each sub-staircase region exposes portions of 2*M number of dielectric layer pairs.
Dependencies are inferred from the claim text.