Semiconductor memory device

A semiconductor memory device comprising:

• a first memory cell provided above a substrate;
• a first word line electrically connected to the first memory cell;
• a second memory cell provided above the first memory cell and connected in series with the first memory cell;
• a second word line electrically connected to the second memory cell;
• a third memory cell provided above the second memory cell and connected in series with the second memory cell;
• a third word line electrically connected to the third memory cell;
• a fourth memory cell provided above the third memory cell and connected in series with the third memory cell;
• a fourth word line electrically connected to the fourth memory cell;
• and
• a driver circuit configured to apply voltages to the first, second, third, and fourth word lines when data is written to a memory cell in a write operation, wherein
• the driver circuit is configured to, in a first write operation for writing data to the second memory cell, apply a first write voltage to the second word line, apply a first voltage lower than the first write voltage to the first word line, and
• apply a second voltage higher than the first voltage and lower than the first write voltage to the third and fourth word lines.