# US 2021/0243531 A1 · Loudspeaker driver systems > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0243531 A1 - Document ID: US20210243531A1 - Status: Published application - Kind: A1 - Application number: 17/163,175 - Filed: 2021-01-29 - Published: 2021-08-05 - Earliest claimed: 2020-01-30 - Assignees: Cirrus Logic International Semiconductor Ltd. - Applicants: Cirrus Logic International Semiconductor Ltd. - Inventors: John P. LESSO - Web page: https://patentgrep.com/patent/US20210243531A1 ## CPC - H03F 3/185: with field-effect devices (H03F3/187 takes precedence) - H04R 9/06: Loudspeakers - H03F 3/2173: {of the bridge type} - H03H 17/06: Non-recursive filters - H03K 5/13: Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals - H03K 5/1534: Transition or edge detectors - H03K 5/1565: {the output pulses having a constant duty cycle} - H04R 1/005: {using digitally weighted transducing elements} - H04R 3/04: for correcting frequency response - H04R 9/063: {using a plurality of acoustic drivers (H04R1/24 and H04R1/403 take precedence)} - H03F 3/2171: {with field-effect devices (H03F3/2173 - H03F3/2178 take precedence)} - H03F 2200/03: the amplifier being designed for audio applications - H03H 17/0286: {Combinations of filter structures} - H04R 9/046: {Construction} - H03F: AMPLIFIERS - H04R: LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; ELECTRIC HEARING AIDS; PUBLIC ADDRESS SYSTEMS (producing sounds with frequency not determined by supply frequency G10K) - H03H: IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS (waveguides, resonators, lines or other devices of the waveguide type H01P) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract A system for driving a transducer having a plurality of coils, the system comprising: a modulator for outputting a digital output signal representative of a received analogue input signal at a modulator output; a clock controlled delay element for applying a delay to the digital output signal to generate a first delayed signal at a delay element output; wherein the modulator output is couplable to a first coil of the plurality of the coils of the transducer and the delay element output is couplable to a second coil of the plurality of coils of the transducer. ## Claims ### Claim 1 A system for driving a transducer having a plurality of coils, the system comprising: a modulator for outputting a digital output signal representative of a received analogue input signal at a modulator output; a clock controlled delay element for applying a delay to the digital output signal to generate a first delayed signal at a delay element output; wherein the modulator output is couplable to a first coil of the plurality of the coils of the transducer and the delay element output is couplable to a second coil of the plurality of coils of the transducer. ### Claim 2 (depends on 1) A system according to claim 1 further comprising a clock signal generator operative to generate a clock signal for the clock controlled delay element. ### Claim 3 (depends on 1) A system according to claim 1 wherein the modulator comprises a class D amplifier. ### Claim 4 (depends on 1) A system according to claim 1 wherein the analogue input signal comprises an audio signal. ### Claim 5 (depends on 1) A system according to claim 1 wherein the input signal comprises a digital signal and the modulator comprises a digital modulator. ### Claim 6 (depends on 1) A system according to claim 1 wherein the clock controlled delay element comprises a clocked buffer or a counter. ### Claim 7 (depends on 6) A system according to claim 6 wherein the clock controlled delay element further comprises an edge detector and an edge generator, wherein: the edge detector is configured to detect an edge of an input PWM signal and to trigger the counter on detection of the edge; the counter is configured to count pulses of the clock signal until a predetermined number is reached and to output a signal to the edge generator when the predetermined number is reached; and the edge generator is configured to output a delayed and inverted version of the input PWM signal as an output PWM signal in response to receiving the signal from the counter. ### Claim 8 (depends on 1) A system according to claim 1 wherein the delay element is configured to apply a delay equal to one period of the output PWM signal to the output PWM signal. ### Claim 9 (depends on 1) A system according to claim 1 wherein the clock controlled delay element forms at least part of a finite impulse response (FIR) filter arrangement. ### Claim 10 (depends on 9) A system according to claim 9 wherein the FIR filter arrangement is configured to receive a configuration signal and, based on configuration signal, to adapt in response to a variation in a frequency of a PWM output signal output by the modulator. ### Claim 11 (depends on 10) A system according to claim 10 wherein the FIR filter arrangement is operative, in response to the configuration signal, to adjust a predetermined value used by a counter of the FIR filter arrangement. ### Claim 12 (depends on 11) A system according to claim 11 wherein the FIR filter arrangement is configured to suppress a carrier of the PWM output signal. ### Claim 13 (depends on 12) A system according to claim 12 wherein the FIR filter arrangement is configured to provide a zero at a carrier frequency of the PWM output signal. ### Claim 14 (depends on 1) A system according to claim 1 wherein a carrier frequency of a PWM output signal output by the modulator can be modulated based on a control signal. ### Claim 15 (depends on 14) A system according to claim 14 wherein the control signal is based on an operating mode of the system. ### Claim 16 (depends on 14) A system according to claim 14 wherein the control signal is based on an input signal level of the input signal. ### Claim 17 (depends on 1) An integrated circuit comprising a system according to claim 1. ### Claim 18 (depends on 1) A device comprising a system according to claim 1, wherein the device comprises a portable device, battery powered device, a mobile telephone a notebook, laptop or tablet computing device a smartwatch or an accessory device. ### Claim 19 A system for driving a transducer, the system comprising: a modulator for outputting a digital output signal representative of a received analogue input signal at a modulator output; a delay element for applying a delay to the digital output signal to generate a first delayed signal at a delay element output; a first inductor having a first terminal coupled to the modulator output; and a second inductor having a first terminal coupled to the delay element output, wherein a second terminal of the first inductor is coupled to a second terminal of the second inductor to provide an output node for a drive signal to drive the transducer. ### Claim 20 (depends on 19) A system according to claim 19 wherein the first inductor and the second inductor comprise first and second coils of the transducer. ### Claim 21 (depends on 19) A system according to claim 19 wherein the transducer comprises a loudspeaker. ### Claim 22 (depends on 19) A module comprising the system of claim 19 and a transducer. ### Claim 23 (depends on 19) An integrated circuit comprising a system according to claim 19.