# US 2021/0243398 A1 · Semiconductor device, system, and device using the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0243398 A1 - Document ID: US20210243398A1 - Status: Published application - Kind: A1 - Application number: 17/161,922 - Filed: 2021-01-29 - Published: 2021-08-05 - Earliest claimed: 2020-01-30 - Assignees: Canon Kabushiki Kaisha - Applicants: Canon Kabushiki Kaisha - Inventors: Kei Ochiai - Web page: https://patentgrep.com/patent/US20210243398A1 ## CPC - H03F 3/70: Charge amplifiers - H03G 3/30: in amplifiers having semiconductor devices - H03F 3/04: with semiconductor devices only - H03F 3/45475: {using IC blocks as the active amplifying circuit} - H03M 1/0604: {at one point, i.e. by adjusting a single reference value, e.g. bias or gain error (gain setting for range control H03M1/18)} - H03M 1/56: Input signal compared with linear ramp - H04N 25/78: Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters - H03F 2203/45514: the FBC comprising one or more switched capacitors, and being coupled between the LC and the IC - H03M 1/12: Analogue/digital converters ({H03M1/001 – } H03M1/10 take precedence) - H03M 1/123: {Simultaneous, i.e. using one converter per channel but with common control or reference circuits for multiple converters} - H03F: AMPLIFIERS - H03G: CONTROL OF AMPLIFICATION - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) - H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION ## Abstract A semiconductor device comprising: a voltage generator configured to generate a voltage; a first analog-to-digital (AD) converter configured to convert an analog value based on a voltage generated by the voltage generator into a first digital value; and a second AD converter configured to convert an analog value based on a voltage generated by the voltage generator into a second digital value, wherein the voltage generator generates voltages by dividing a power supply voltage by resistive elements. ## Claims ### Claim 1 A semiconductor device comprising: a voltage generator configured to generate a voltage; a first analog-to-digital (AD) converter configured to convert an analog value based on a voltage generated by the voltage generator into a first digital value; and a second AD converter configured to convert an analog value based on a voltage generated by the voltage generator into a second digital value, wherein the voltage generator generates voltages by dividing a power supply voltage by resistive elements. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein the first AD converter and the second AD converter simultaneously perform AD conversion to obtain the first digital value and AD conversion to obtain the second digital value. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, further comprising: a signal generator configured to generate a signal corresponding to an input from outside; and a third AD converter configured to convert an analog value based on the signal into a third digital value. ### Claim 4 (depends on 3) The semiconductor device according to claim 3, wherein a voltage source of the voltage generator is different from a voltage source of the signal generator. ### Claim 5 (depends on 3) The semiconductor device according to claim 3, wherein the semiconductor device outputs the third digital value, the first digital value, and the second digital value or outputs the third digital value and a value based on the first digital value and the second digital value. ### Claim 6 (depends on 3) The semiconductor device according to claim 3, wherein the voltage generator is configured to generate a first voltage and a second voltage by dividing the power supply voltage by resistive elements, the first AD converter is configured to convert a first analog value based on the first voltage into the first digital value, and the second AD converter is configured to convert a second analog value based on the second voltage into the second digital value. ### Claim 7 (depends on 6) The semiconductor device according to claim 6, comprising at least one of a switch configured to selectively connect either the voltage generator or the signal generator to the first AD converter and a switch configured to selectively connect either the voltage generator or the signal generator to the second AD converter. ### Claim 8 (depends on 3) The semiconductor device according to claim 3, comprising: a first amplifier configured to amplify a voltage generated by the voltage generator to a first analog value by a first gain; and a second amplifier configured to amplify a voltage generated by the voltage generator to a second analog value by a second gain, wherein the first AD converter is configured to convert the first analog value into the first digital value, and wherein the second AD converter is configured to convert the second analog value into the second digital value. ### Claim 9 (depends on 8) The semiconductor device according to claim 8, wherein the first gain is 1 time. ### Claim 10 (depends on 8) The semiconductor device according to claim 8, comprising a third amplifier configured to amplify a voltage generated by the signal generator to a third analog value by a third gain, wherein the third AD converter converts the third analog value into a third digital value. ### Claim 11 (depends on 10) The semiconductor device according to claim 10, comprising a switch configured to selectively connect either the voltage generator or the signal generator to the second AD converter. ### Claim 12 (depends on 10) The semiconductor device according to claim 10, wherein the third amplifier has a variable gain. ### Claim 13 (depends on 8) The semiconductor device according to claim 8, wherein the first amplifier has a fixed gain and the second amplifier has a variable gain. ### Claim 14 (depends on 3) The semiconductor device according to claim 3, further comprising a signal processing circuit configured to correct the third digital value based on a ratio between the first digital value and the second digital value. ### Claim 15 (depends on 3) The semiconductor device according to claim 3, wherein the signal generator is a pixel array. ### Claim 16 (depends on 1) The semiconductor device according to claim 1, wherein the voltage generator includes no active elements. ### Claim 17 (depends on 3) A system comprising: a semiconductor device according to claims 3; and a signal processing unit configured to correct the third digital value based on a ratio between the first digital value and the second digital value. ### Claim 18 A system comprising: a signal generator configured to generate a signal corresponding to an input from outside; a voltage generator configured to generate a voltage; a first AD converter configured to convert an analog value base on a voltage generated by the voltage generator into a first digital value; a second AD converter configured to convert an analog value based on a voltage generated by the voltage generator into a second digital value; and a third AD converter configured to convert an analog value based on the signal generated by the signal generator into a third digital value, wherein the third digital value is corrected based on a ratio between the first digital value and the second digital value. ### Claim 19 (depends on 1) A system comprising: a semiconductor device according to claim 1; and a signal processing unit configured to process a signal outputted from the semiconductor device. ### Claim 20 (depends on 1) A device comprising: a semiconductor device according to claim 1; a driving device for driving an object; a processing apparatus configured to acquire information from a signal outputted from the semiconductor device; and a control apparatus configured to control the driving device based on the information.