# US 2021/0242896 A1 · Chip radio frequency package and radio frequency module > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0242896 A1 - Document ID: US20210242896A1 - Status: Published application - Kind: A1 - Application number: 16/994,955 - Filed: 2020-08-17 - Published: 2021-08-05 - Earliest claimed: 2020-02-05 - Assignees: Samsung Electro-Mechanics Co., Ltd. - Applicants: Samsung Electro-Mechanics Co., Ltd. - Inventors: Hak Gu KIM; Ho Kyung KANG; Seong Jong CHEON; Young Sik HUR; Jin Seon PARK; Yong Duk LEE - Web page: https://patentgrep.com/patent/US20210242896A1 ## CPC - H04B 1/40: Circuits - H01Q 1/2283: {mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package} - H01Q 9/0407: {Substantially flat resonant element parallel to ground plane, e.g. patch antenna (dipole H01Q9/285; monopole H01Q9/40)} - H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons - H10W 44/20: at high-frequency [HF] or radio frequency [RF] - H10W 70/09: extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs - H10W 70/611: {for connecting multiple chips together} - H10W 70/614: {the multiple chips being integrally enclosed} - H10W 70/635: {Through-vias} - H10W 70/685: comprising multiple insulating layers - H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps - H10W 90/00: Package configurations - H10W 44/248: {for antennas} - H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) - H10W 70/655: Fan-out layouts - H10W 74/00: Encapsulations, e.g. protective coatings - H10W 74/142: {the encapsulations exposing the passive side of the semiconductor body} - H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills - H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs} - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H10W 90/722: {between stacked chips} - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL} - H04B: TRANSMISSION - H01Q: ANTENNAS, i.e. RADIO AERIALS (radiators or antennas for microwave heating H05B6/72) - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A chip radio frequency package includes a substrate including a first cavity, first and second connection members, a core member, a radio frequency integrated circuit (RFIC) disposed on an upper surface of the substrate, and a first front-end integrated circuit (FEIC) disposed in the first cavity. The core member includes a core insulating layer and a core via that penetrates the core insulating layer. The first connection member has a structure in which a first insulating layer and a first wiring layer are stacked. The second connection member has a second structure in which a second insulating layer and a second wiring layer are stacked. The RFIC inputs or outputs a base signal and a first radio frequency (RF) signal having a frequency higher than a frequency of the base signal, and the first FEIC inputs or outputs the first RF signal and a second RF signal. ## Claims ### Claim 1 A radio frequency module, comprising: a first substrate including first and second connection members, and including a core member disposed between the first and second connection members and having a first cavity; a radio frequency IC (RFIC) disposed on an upper surface of the first substrate; a first front end IC (FEIC) disposed in the first cavity; and a second substrate providing a dispositional region of the first substrate, wherein the core member comprises a core insulating layer, and a core via disposed to penetrate through the core insulating layer, the first connection member has a first stacked structure in which at least one first insulating layer and at least one first wiring layer are alternately stacked, is electrically connected to the core via, and disposed on a lower surface of the core member, the second connection member has a second stacked structure in which at least one second insulating layer and at least one second wiring layer are alternately stacked, is electrically connected to the core via, and disposed on an upper surface of the core member, the RFIC inputs or outputs a base signal and a first radio frequency (RF) signal having a frequency, higher than the frequency of the base signal, through the at least one second wiring layer, and the first RFIC inputs or outputs the first RF signal and a second RF signal having power, different from that of the first RF signal. ### Claim 2 (depends on 1) The radio frequency module of claim 1, further comprising an electrical connection structure electrically connected between the second substrate and the first substrate, wherein the first substrate is disposed on an upper surface of the second substrate. ### Claim 3 (depends on 1) The radio frequency module of claim 1, wherein the second substrate comprises a patch antenna pattern configured to transmit or receive the second RF signal, and a feed via configured to be fed to the patch antenna pattern. ### Claim 4 (depends on 1) The radio frequency module of claim 1, further comprising a chip antenna disposed on the second substrate and configured to transmit or receive the second RF signal, and having a higher dielectric constant than the dielectric constant of the second substrate, wherein the second substrate comprises a feed via configured to be fed to the chip antenna. ### Claim 5 (depends on 1) The radio frequency module of claim 1, further comprising a second FEIC disposed in a second cavity of the core member. ### Claim 6 (depends on 5) The radio frequency module of claim 5, wherein the second substrate comprises at least four patch antenna patterns configured to transmit or receive the second RF signal; and at least four feed vias configured to be fed to a corresponding patch antenna pattern among the at least four patch antenna patterns, respectively, wherein at least two of the at least four feed vias are electrically connected to the first FEIC, and a remainder thereof are electrically connected to the seconds FEIC. ### Claim 7 (depends on 5) The radio frequency module of claim 5, further comprising at least four chip antennas disposed on the second substrate, and configured to transmit or receive the second RF signal and having a higher dielectric constant than the dielectric constant of the second substrate; and at least four feed vias configured to be fed to a corresponding chip antenna among the at least four chip antennas, respectively, wherein at least two of the at least four feed vias are electrically connected to the first FEIC, and a remainder thereof are electrically connected to the second FEIC. ### Claim 8 (depends on 1) The radio frequency module of claim 1, further comprising an encapsulant sealing at least a portion of the RFIC on the upper surface of the first substrate. ### Claim 9 (depends on 1) The radio frequency module of claim 1, wherein the lower surface of the first substrate is smaller than the upper surface of the second substrate. ### Claim 10 (depends on 1) The radio frequency module of claim 1, wherein the first substrate is comprised of a plurality of first substrates, spaced apart from each other, the first FEIC is disposed on one of the plurality of first substrates, the radio frequency module further comprises a second FEIC disposed on the other one of the plurality of first substrates, the second substrate is comprised of a plurality of second substrates, spaced apart from each other, and each of the plurality of second substrates provides at least one of a first dispositional region of the patch antenna pattern configured to transmit or receive the second RF signal and a second dispositional region of the chip antenna configured to transmit or receive the second RF signal and having a higher dielectric constant than the dielectric constant of the second substrate. ### Claim 11 (depends on 10) The radio frequency module of claim 10, wherein the plurality of second substrates are comprised of at least three second substrates, spaced apart from each other, and at least one of the at least three second substrates is spaced apart from the plurality of first substrates. ### Claim 12 A radio frequency module, comprising: a first substrate including first and second connection members, and including a core member disposed between the first and second connection members and having a first cavity; a first front end IC (FEIC) disposed in the first cavity; a radio frequency IC (RFIC) electrically connected to the first FEIC; a base substrate providing a dispositional region of the first substrate; and a plurality of antenna modules disposed on the base substrate, spaced apart from each other and electrically connected to the first FEIC, and configured to transmit or receive a second radio frequency (RF) signal, respectively, wherein the core member comprises a core insulating layer and a core via disposed to penetrate through the core insulating layer, the first connection member has a first stacked structure in which at least one first insulating layer and at least one first wiring layer are alternately stacked, is electrically connected to the core via, and disposed on a lower surface of the core member, the second connection member has a second stacked structure in which at least one second insulating layer and at least one second wiring layer are alternately stacked, is electrically connected to the core via, and disposed on an upper surface of the core member, the RFIC inputs or outputs a base signal and a first RF signal having a higher frequency than the frequency of the base signal, and the first FEIC inputs or outputs the first RF signal and the second RF signal having power, different from the power of the first RF signal. ### Claim 13 (depends on 12) The chip frequency module of claim 12, wherein at least one of the plurality of antenna modules comprises a second substrate including a plurality of feed vias electrically connected to the base substrate, and a plurality of patch antenna patterns fed from a corresponding feed via of the plurality of feed vias. ### Claim 14 (depends on 12) The chip frequency module of claim 12, wherein at least one of the plurality of antenna modules comprises a second substrate including a plurality of feed vias electrically connected to the base substrate, and a plurality of chip antennas disposed on the second substrate, and configured to transmit or receive the second RF signal and having a higher dielectric constant than the dielectric constant of the second substrate. ### Claim 15 (depends on 12) The chip frequency module of claim 12, further comprising a second FEIC disposed in a second cavity of the core member, wherein the plurality of antenna modules comprise at least three antenna modules, and at least one of the first and second FEICs is electrically connected to at least two of the at least three antenna modules. ### Claim 16 (depends on 12) The radio frequency module of claim 12, wherein the plurality of antenna modules are disposed to transmit or receive the second RF signal in different directions from each other. ### Claim 17 (depends on 16) The radio frequency module of claim 16, further comprising a communication modem disposed on the base substrate, wherein the base substrate provides a dispositional region of the RFIC.