# US 2021/0242773 A1 · Error amplifier with programmable on-chip and off-chip compensation > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0242773 A1 - Document ID: US20210242773A1 - Status: Published application - Kind: A1 - Application number: 16/782,525 - Filed: 2020-02-05 - Published: 2021-08-05 - Earliest claimed: 2020-02-05 - Assignees: Texas Instruments Incorporated - Applicants: Texas Instruments Incorporated - Inventors: Tawen MEI; Karen CHAN - Web page: https://patentgrep.com/patent/US20210242773A1 ## CPC - H02M 1/0025: {Arrangements for modifying reference values, feedback values or error values in the control loop of a converter} - H02M 3/156: with automatic control of output voltage or current, e.g. switching regulators - H03K 5/24: the characteristic being amplitude - H02M 3/158: including plural semiconductor devices as final control devices for a single load - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract A system includes: an input voltage source; a power stage coupled to the input voltage source; a load coupled to an output of the power stage; and an error amplifier circuit coupled to the power stage. The error amplifier circuit includes an error amplifier; a transconductance stage coupled to an output of the error amplifier; an internal compensation switch; an external compensation switch; and control logic coupled to the internal compensation switch and the external compensation switch. The control logic is configured to selectively operate the internal compensation switch and the external compensation switch in one of an internal compensation mode and an external compensation mode. ## Claims ### Claim 1 A system, comprising: an input voltage source; a power stage coupled to the input voltage source; a load coupled to an output of the power stage; and an error amplifier circuit coupled to the power stage, wherein the error amplifier circuit comprises: an error amplifier; and a transconductance stage coupled to an output of the error amplifier; an internal compensation switch; an external compensation switch; and control logic coupled to the internal compensation switch and the external compensation switch, wherein the control logic is configured to selectively operate the internal compensation switch and the external compensation switch in an internal compensation mode and an external compensation mode. ### Claim 2 (depends on 1) The system of claim 1, wherein the error amplifier circuit further comprises an external compensation pad coupled to an output of the transconductance stage, wherein the control logic is configured to open the internal compensation switch and to close the external compensation switch when an external compensation circuit is coupled to the external compensation pad. ### Claim 3 (depends on 2) The system of claim 2, wherein the external compensation circuit comprises a capacitor. ### Claim 4 (depends on 3) The system of claim 3, wherein the external compensation circuit comprises a resistor, wherein a size of the capacitor and the resistor are selected to provide a predetermined impedance. ### Claim 5 (depends on 1) The system of claim 1, wherein the internal compensation circuit comprises: a resistor with a first end coupled to the output of the error amplifier and with a second end coupled to a first terminal of the internal compensation switch; a capacitor with a first plate coupled to a second terminal of the internal compensation switch and with a second plate coupled to a ground node. ### Claim 6 (depends on 5) The system of claim 5, wherein the resistor has a value of at least 0.9M ohms. ### Claim 7 (depends on 5) The system of claim 5, wherein the capacitor has a value of at least 25 pF. ### Claim 8 (depends on 1) The system of claim 1, wherein the transconductance stage has a gain of at least 10. ### Claim 9 (depends on 1) The system of claim 1, wherein the power stage comprises: a pulse-width modulation (PWM) comparator configured to receive an oscillator ramp as a first input and to receive an output of the error amplifier circuit as a second input; a driver circuit coupled to an output of the PWM comparator; a high-side switch coupled to the driver circuit; and a low-side switch coupled to the driver circuit. ### Claim 10 A switching converter circuit, comprising: a pulse-width modulation (PWM) comparator; an error amplifier circuit coupled to an input of the PWM comparator, wherein the error amplifier circuit comprises: an error amplifier with a reference voltage input and with a feedback voltage input; an internal compensation circuit coupled to an output of the error amplifier, wherein the internal compensation circuit includes an internal compensation switch; a transconductance stage coupled to an output of the error amplifier; and an external compensation switch coupled between an output of the transconductance stage and the internal compensation switch; and an external compensation pad coupled to the external compensation switch and the output of the transconductance stage. ### Claim 11 (depends on 10) The switching converter circuit of claim 10, wherein the internal compensation switch is configured to be open and the external compensation switch is configured to be closed when an external compensation circuit is coupled to the external compensation pad. ### Claim 12 (depends on 10) The switching converter circuit of claim 10, wherein the internal compensation circuit comprises: a resistor with a first end coupled to the output of the error amplifier and with a second end coupled to a first terminal of the internal compensation switch; a capacitor with a first plate coupled to a second terminal of the internal compensation switch and with a second plate coupled to a ground node. ### Claim 13 (depends on 12) The switching converter circuit of claim 12, further comprising: a first feedback loop between an output of the transconductance stage and a negative input of the transconductance stage; and a second feedback loop between an output of the transconductance stage and a positive input of the transconductance stage. ### Claim 14 (depends on 13) The switching converter circuit of claim 13, wherein the resistor is part of the second feedback loop and is not part of the first feedback loop. ### Claim 15 (depends on 13) The switching converter circuit of claim 13, wherein the external compensation switch and the capacitor are coupled between an internal node of the second feedback loop and a ground node, wherein the internal node is not part of the first feedback loop. ### Claim 16 An error amplifier circuit, comprising: an error amplifier; a transconductance stage coupled to an output of the error amplifier; an internal compensation circuit coupled to an output of the error amplifier, wherein the internal compensation circuit comprises an internal compensation switch; an external compensation switch coupled to the internal compensation switch, wherein the error amplifier circuit is configured to selectively use one of internal compensation based on the internal compensation circuit and external compensation. ### Claim 17 (depends on 16) The error amplifier circuit of claim 16, wherein the output of the error amplifier is coupled to a positive input of the transconductance stage, and wherein the transconductance stage includes a feedback loop between an output of the transconductance stage and the positive input. ### Claim 18 (depends on 17) The error amplifier circuit of claim 17, wherein the feedback loop is a first feedback loop, and wherein the transconductance stage includes a second feedback loop between an output of the transconductance stage and a negative input of the transconductance stage, wherein the external compensation switch is part of the first feedback loop and is not part of the second feedback loop. ### Claim 19 (depends on 18) The error amplifier circuit of claim 18, wherein the internal compensation circuit comprises a resistor that is part of the first feedback loop and not part of the second feedback loop. ### Claim 20 (depends on 18) The error amplifier circuit of claim 18, wherein the internal compensation circuit comprises a capacitor, wherein the internal compensation switch and the capacitor are between an internal node of the first feedback loop and a ground node, wherein the internal node is not part of the second feedback loop.