# US 2021/0242772 A1 · Reference current source circuit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0242772 A1 - Document ID: US20210242772A1 - Status: Published application - Kind: A1 - Application number: 17/160,520 - Filed: 2021-01-28 - Published: 2021-08-05 - Earliest claimed: 2020-01-31 - Assignees: Rohm Co., Ltd. - Applicants: ROHM Co., LTD. - Inventors: Naohiro Nomura; Takatoshi Manabe - Web page: https://patentgrep.com/patent/US20210242772A1 ## CPC - H02M 3/155: using semiconductor devices only - G05F 3/242: {with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage} - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) - G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES ## Abstract A first current mirror circuit is provided between a first transistor and a power supply line to return a current that flows to the first transistor. A second current mirror circuit returns an output current from the first current mirror circuit, and generates a starting current. An inverter has an input connected to a node, and an output connected to a control terminal of the first transistor. A first current source generates a first current when a power supply voltage has exceeded a first threshold value. A third current mirror circuit draws a current proportional to the first current from an input side of the second current mirror circuit. A second current source supplies a second current to the node when the power supply voltage has exceeded a second threshold value. ## Claims ### Claim 1 A reference current source circuit comprising: a constant current circuit configured to generate a reference current; and a starting circuit configured to sink a starting current from the constant current circuit at startup, wherein the starting circuit includes a first transistor, an impedance circuit provided between the first transistor and a ground line, a first current mirror circuit provided between the first transistor and a power supply line to return a current that flows to the first transistor, a second current mirror circuit configured to return an output current from the first current mirror circuit, and generate the starting current, an inverter having an input connected to a connection node between the first transistor and the first current mirror circuit, and having an output connected to a control terminal of the first transistor, a first current source configured to generate a first current when a power supply voltage of the power supply line has exceeded a first threshold value, a third current mirror circuit configured to draw a current proportional to the first current from an input side of the second current mirror circuit, and a second current source configured to supply a second current to the connection node between the first transistor and the first current mirror circuit when the power supply voltage has exceeded a second threshold value higher than the first threshold value. ### Claim 2 (depends on 1) The reference current source circuit according to claim 1, wherein the impedance circuit includes a resistor. ### Claim 3 (depends on 1) The reference current source circuit according to claim 1, wherein the impedance circuit includes a depletion-type negative-channel metal oxide semiconductor transistor having a gate connected to a ground. ### Claim 4 (depends on 3) The reference current source circuit according to claim 3, wherein the impedance circuit further includes a resistor connected in series with the negative-channel metal oxide semiconductor transistor. ### Claim 5 (depends on 1) The reference current source circuit according to claim 1, wherein the impedance circuit includes a current source. ### Claim 6 (depends on 1) The reference current source circuit according to claim 1, wherein the inverter includes two positive-channel metal oxide semiconductor transistors connected in parallel, and two negative-channel metal oxide semiconductor transistors connected in series. ### Claim 7 (depends on 6) The reference current source circuit according to claim 6, wherein the two positive-channel metal oxide semiconductor transistors have different sizes. ### Claim 8 (depends on 1) The reference current source circuit according to claim 1, wherein the constant current circuit includes a fifth current mirror circuit including a first negative-channel metal oxide semiconductor transistor on an input side and a second negative-channel metal oxide semiconductor transistor on an output side, a fourth current mirror circuit configured to supply a current equal in amount to a current that flows to a first path including the second negative-channel metal oxide semiconductor transistor to a second path including the first negative-channel metal oxide semiconductor transistor, and supply, to a third path, a current having a current amount equal to that of the current flowing to the first path multiplied by a predetermined number, a third negative-channel metal oxide semiconductor transistor provided on the third path, the third negative-channel metal oxide semiconductor transistor having a source connected to one end of the first negative-channel metal oxide semiconductor transistor, a fourth negative-channel metal oxide semiconductor transistor provided on a lower potential side of the third negative-channel metal oxide semiconductor transistor on the third path, the fourth negative-channel metal oxide semiconductor transistor having a gate connected in common to a gate of the third negative-channel metal oxide semiconductor transistor, and a resistor provided between a source of the fourth negative-channel metal oxide semiconductor transistor and one end of the second negative-channel metal oxide semiconductor transistor.