# US 2021/0242353 A1 · Trench capacitor component with reduced equivalent series resistance and equivalent series inductance

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2021/0242353 A1
- Document ID: US20210242353A1
- Status: Published application
- Kind: A1
- Application number: 16/782,865
- Filed: 2020-02-05
- Published: 2021-08-05
- Earliest claimed: 2020-02-05
- Assignees: QUALCOMM Incorporated
- Applicants: QUALCOMM Incorporated
- Inventors: Jonghae KIM; Periannan CHIDAMBARAM
- Web page: https://patentgrep.com/patent/US20210242353A1

## CPC

- H10D 1/665: {Trench conductor-insulator-semiconductor capacitors, e.g. trench MOS capacitors}
- H10W 20/023: {the interconnections being through-semiconductor vias}
- H10D 1/047: {of conductor-insulator-semiconductor capacitors, e.g. trench capacitors}
- H10D 1/68: Capacitors having no potential barriers
- H10D 84/212: {of only capacitors}
- H10W 20/0234: {comprising etching via holes that stop on pads or on electrodes}
- H10W 20/0242: {comprising etching via holes from the back sides of the chips, wafers or substrates}
- H10W 20/0245: {comprising use of blind vias during the manufacture}
- H10W 20/057: {by selectively depositing, e.g. by using selective CVD or plating}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 20/2128: {Coaxial through-semiconductor vias}
- H10W 20/496: {Capacitor integral with wiring layers}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Certain aspects of the present disclosure generally relate to a capacitive element. One example capacitive element generally includes a substrate, a plurality of trench capacitors, an electrically conductive via, a first electrically conductive contact, and a second electrically conductive contact. The trench capacitors intersect the substrate. The electrically conductive via intersects the substrate and is disposed adjacent to at least one of the trench capacitors. The first electrically conductive contact is disposed above the substrate, and the second electrically conductive contact is disposed below the substrate and electrically coupled to the plurality of trench capacitors through the electrically conductive via.

## Claims

### Claim 1

A capacitive element comprising:
a substrate;
a plurality of trench capacitors intersecting the substrate;
an electrically conductive via intersecting the substrate and disposed adjacent to at least one of the trench capacitors;
a first electrically conductive contact disposed above the substrate; and
a second electrically conductive contact disposed below the substrate and electrically coupled to the plurality of trench capacitors through the electrically conductive via.

### Claim 2 (depends on 1)

The capacitive element of claim 1, wherein each of the trench capacitors comprises:
a trench intersecting the substrate;
a first electrically conductive layer disposed in the trench;
a second electrically conductive layer disposed in the trench; and
a dielectric layer disposed between the first electrically conductive layer and the second electrically conductive layer in the trench.

### Claim 3 (depends on 2)

The capacitive element of claim 2, wherein the conductive via is electrically coupled to the first conductive layer, the first conductive contact, and the second conductive contact.

### Claim 4 (depends on 2)

The capacitive element of claim 2, further comprising an additional electrically conductive via intersecting the substrate and electrically coupled to the second conductive layer.

### Claim 5 (depends on 4)

The capacitive element of claim 4, further comprising a third electrically conductive contact disposed above the substrate and electrically coupled to the second conductive layer.

### Claim 6 (depends on 5)

The capacitive element of claim 5, further comprising a fourth electrically conductive contact disposed below the substrate and electrically coupled to the second conductive layer, wherein the additional conductive via is electrically coupled to the third conductive contact and the fourth conductive contact.

### Claim 7 (depends on 1)

The capacitive element of claim 1, further comprising:
an additional substrate; and
a plurality of additional trench capacitors intersecting the additional substrate, wherein the substrate is disposed above the additional substrate and wherein the trench capacitors are electrically coupled to the additional trench capacitors through the conductive via and the second conductive contact.

### Claim 8 (depends on 1)

The capacitive element of claim 1, wherein the trench capacitors are electrically coupled in parallel with each other.

### Claim 9 (depends on 1)

The capacitive element of claim 1, wherein the trench capacitors extend from a surface of the substrate only partially through a thickness of the substrate.

### Claim 10 (depends on 1)

The capacitive element of claim 1, wherein the conductive via is a through-silicon via that spans a thickness of the substrate.

### Claim 11 (depends on 1)

An integrated circuit (IC) package comprising the capacitive element of claim 1, wherein the capacitive element is disposed on a land side of the IC package between electrical contacts extending from a surface of the IC package.

### Claim 12 (depends on 11)

The IC package of claim 11, wherein the capacitive element is electrically coupled to a power distribution network of the IC package.

### Claim 13

A method of fabricating a capacitive element comprising:
forming a plurality of trench capacitors that intersect a substrate;
forming an electrically conductive via that intersects the substrate;
forming a first electrically conductive contact above the substrate; and
forming a second electrically conductive contact below the substrate, wherein:
the electrically conductive via is adjacent to at least one of the trench capacitors; and
the second electrically conductive contact is electrically coupled to the plurality of trench capacitors through the electrically conductive via.

### Claim 14 (depends on 13)

The method of claim 13, wherein forming the plurality of trench capacitors further comprises:
forming a plurality of trenches in the substrate, wherein the trenches extend from a surface of the substrate only partially through a thickness of the substrate;
forming a first electrically conductive layer in a portion of the trenches;
forming a dielectric layer in the portion of the trenches; and
forming a second electrically conductive layer in the portion of the trenches, wherein the dielectric layer is disposed between the first electrically conductive layer and the second electrically conductive layer.

### Claim 15 (depends on 14)

The method of claim 14, wherein forming the conductive via comprises:
forming a cavity through the substrate; and
filling the cavity with an electrically conductive material to form the conductive via as a through-silicon via that spans a thickness of the substrate, wherein the conductive via is electrically coupled to the first conductive layer, the first conductive contact, and the second conductive contact.

### Claim 16 (depends on 14)

The method of claim 14, further comprising forming an additional electrically conductive via intersecting the substrate and electrically coupled to the second conductive layer.

### Claim 17 (depends on 16)

The method of claim 16, further comprising forming a third electrically conductive contact disposed above the substrate and electrically coupled to the second conductive layer.

### Claim 18 (depends on 17)

The method of claim 17, further comprising forming a fourth electrically conductive contact disposed below the substrate and electrically coupled to the second conductive layer, wherein the additional conductive via is electrically coupled to the third conductive contact and the fourth conductive contact.

### Claim 19 (depends on 13)

The method of claim 13, wherein forming the first conductive contact comprises forming a wiring layer above the trench capacitors and adjacent to the first conductive contact and wherein the wiring layer electrically couples the trench capacitors to the first conductive contact.

### Claim 20 (depends on 13)

The method of claim 13, wherein forming the second conductive contact comprises:
bonding a temporary carrier above the first conductive contact such that the substrate and the temporary carrier form a stacked structure;
inverting the stacked structure such that the substrate is above the bonded temporary carrier;
forming the second conductive contact above the substrate in the inverted stacked structure, wherein the second conductive contact is electrically coupled to the conductive via; and
removing the temporary carrier.