# US 2021/0242345 A1 · Semiconductor device and method for manufacturing semiconductor device

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- Number: US 2021/0242345 A1
- Document ID: US20210242345A1
- Status: Published application
- Kind: A1
- Application number: 17/049,042
- Filed: 2019-05-14
- Published: 2021-08-05
- Earliest claimed: 2018-05-25
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Semiconductor Energy Laboratory Co., Ltd.
- Inventors: Shunpei YAMAZAKI; Erika TAKAHASHI; Hiroaki HONDA; Kentaro SUGAYA; Shinya SASAGAWA
- Web page: https://patentgrep.com/patent/US20210242345A1

## CPC

- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10B 12/00: Dynamic random access memory [DRAM] devices
- H10B 41/70: the floating gate being an electrode shared by two or more components
- H10D 30/031: {of thin-film transistors [TFT]}
- H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs}
- H10D 30/68: Floating-gate IGFETs
- H10D 30/69: IGFETs having charge trapping gate insulators, e.g. MNOS transistors
- H10D 62/405: {Orientations of crystalline planes}
- H10D 62/80: characterised by the materials
- H10D 62/875: {being semiconductor metal oxide, e.g. InGaZnO (Group II-VI materials H10D62/86; Group I-VI materials H10D62/871; Pb compounds or alloys H10D62/874)}
- H10D 84/0126: {the components including insulated gates, e.g. IGFETs}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10P 14/3426: {Oxides}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10B: ELECTRONIC MEMORY DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device with favorable reliability is provided. The semiconductor device includes a first oxide, a second oxide, a first conductor, a second conductor, a third conductor, a first insulator, and a second insulator. The first conductor is provided in contact with a top surface of the first oxide. The second conductor is provided in contact with the top surface of the first oxide. The first insulator is provided over the first conductor and the second conductor. The second oxide is provided in contact with the top surface of the first oxide. The second insulator is provided over the second oxide. The third conductor is provided over the second insulator. The first insulator has a function of inhibiting diffusion of oxygen. The first oxide includes indium, an element M (M is gallium, yttrium, or tin), and zinc. The first oxide includes a first region overlapping with the third conductor. A region of the first region in contact with the second oxide includes a region in which an atomic ratio of aluminum (Al) to the element M is less than 0.1.

## Claims

### Claim 1

A semiconductor device comprising:
a fourth conductor functioning as a bottom gate electrode;
a fifth insulator over the fourth conductor;
a third insulator over the fifth insulator;
a third oxide over the third insulator;
a first oxide over the third oxide, the first oxide comprising a channel formation region;
a first conductor over and in contact with a top surface of the first oxide, the first conductor functioning as one of a source electrode and a drain electrode;
a second conductor over and in contact with the top surface of the first oxide, the second conductor functioning as the other of the source electrode and the drain electrode;
a first insulator over the first conductor and the second conductor;
a second oxide in contact with the top surface of the first oxide;
a second insulator over the second oxide, the second insulator functioning as a gate insulator;
a third conductor over the second insulator, the third conductor functioning as a gate electrode; and
a fourth insulator over the first insulator,
wherein the second oxide, the second insulator, the third conductor are positioned inside an opening in the first insulator and an opening in the fourth insulator,
wherein the first insulator comprises aluminum,
wherein the first oxide comprises indium, an element M, and zinc,
wherein the element M is gallium, yttrium, or tin,
wherein the first oxide comprises a first region overlapping with the third conductor, and
wherein the first region comprises a region in which an atomic ratio of aluminum to the element M is less than 0.1.

### Claim 2

(canceled)

### Claim 3

A semiconductor device comprising:
a first oxide comprising a channel formation region;
a first conductor over and in contact with a top surface of the first oxide, the first conductor functioning as one of a source electrode and a drain electrode;
a second conductor over and in contact with the top surface of the first oxide, the second conductor functioning as the other of the source electrode and the drain electrode;
a first insulator over the first conductor and the second conductor;
a second oxide in contact with the top surface of the first oxide;
a second insulator over the second oxide, the second insulator functioning as a gate insulator; and
a third conductor over the second insulator, the third conductor functioning as a gate electrode,
wherein the first insulator comprises aluminum,
wherein the first oxide comprises indium, an element M, and zinc,
wherein the element M is gallium, yttrium, or tin,
wherein the first oxide comprises a first region overlapping with the third conductor, and
wherein the first region comprises a region in which an atomic ratio of aluminum to the element M is less than 0.1.

### Claim 4

(canceled)

### Claim 5 (depends on 1)

The semiconductor device according to claim 1,
wherein the first oxide further comprises:
a second region in contact with the first conductor; and
a third region in contact with the second conductor,
wherein a thickness of the first oxide in the first region is smaller than a thickness of the first oxide in the second region, and
wherein a thickness of the first oxide in the first region is smaller than a thickness of the first oxide in the third region.

### Claim 6

A fabrication method of a semiconductor device comprising a first oxide, a second oxide, a third oxide, a first conductor, a second conductor, a third conductor, a first insulator, a second insulator, a third insulator, and a fourth insulator, comprising:
forming the third insulator;
forming the third oxide over the third insulator;
forming the first oxide over the third oxide;
forming a conductive film over the first oxide;
forming the first insulator over the third insulator and the conductive film;
forming the fourth insulator over the first insulator;
forming an opening from which the first oxide is exposed in the fourth insulator, the first insulator, and the conductive film, so that the first conductor and the second conductor are formed;
removing part of the exposed first oxide;
forming the second oxide over the first oxide and the fourth insulator;
forming the second insulator over the second oxide;
forming the third conductor over the second insulator; and
removing part of the second oxide, the second insulator, and the third conductor to expose part of the fourth insulator,
wherein the first insulator comprises aluminum,
wherein the first oxide comprises indium, an element M, and zinc, and
wherein the element M is gallium, yttrium, or tin.

### Claim 7 (depends on 6)

The fabrication method of the semiconductor device according to claim 6,
wherein the step of removing part of the exposed first oxide is performed by diluted ammonia water.

### Claim 8 (depends on 7)

The fabrication method of the semiconductor device according to claim 7,
wherein an ammonia concentration of the diluted ammonia water is greater than or equal to 0.1% and less than or equal to 0.5%.

### Claim 9 (depends on 6)

The fabrication method of the semiconductor device according to claim 6,
wherein the first oxide comprises a region in which an atomic ratio of aluminum to the element M is less than 0.1.

### Claim 10 (depends on 1)

The semiconductor device according to claim 1,
wherein each of the first oxide and the second oxide comprises a c-axis aligned crystal.

### Claim 11 (depends on 1)

The semiconductor device according to claim 1,
wherein the first region comprises a first end portion, a second end portion, and a top end portion between the first end portion and the second end portion, and
wherein an atomic ratio of aluminum to the element M in the top end portion is smaller than an atomic ratio of aluminum to the element M in each of the first end portion and the second end portion.

### Claim 12 (depends on 3)

The semiconductor device according to claim 3,
wherein the first oxide further comprises:
a second region in contact with the first conductor; and
a third region in contact with the second conductor,
wherein a thickness of the first oxide in the first region is smaller than a thickness of the first oxide in the second region, and
wherein a thickness of the first oxide in the first region is smaller than a thickness of the first oxide in the third region.

### Claim 13 (depends on 3)

The semiconductor device according to claim 3, wherein each of the first oxide and the second oxide comprises a c-axis aligned crystal.

### Claim 14 (depends on 3)

The semiconductor device according to claim 3,
wherein the first region comprises a first end portion, a second end portion, and a top end portion between the first end portion and the second end portion, and
wherein an atomic ratio of aluminum to the element M in the top end portion is smaller than an atomic ratio of aluminum to the element M in each of the first end portion and the second end portion.