# US 2021/0242332 A1 · Fin field effect transistor device structure and method for forming the same

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- Number: US 2021/0242332 A1
- Document ID: US20210242332A1
- Status: Published application
- Kind: A1
- Application number: 16/900,105
- Filed: 2020-06-12
- Published: 2021-08-05
- Earliest claimed: 2020-01-30
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Co., Ltd.
- Inventors: Ta-Chun MA; Yee-Chia YEO
- Web page: https://patentgrep.com/patent/US20210242332A1

## CPC

- H10D 30/024: {of fin field-effect transistors [FinFET]}
- H10D 30/6213: {having rounded corners}
- H10D 30/0245: {by further thinning the channel after patterning the channel, e.g. using sacrificial oxidation on fins}
- H10D 30/6211: {having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates}
- H10D 62/299: {having lateral doping variations (IGFETs having lightly doped source or drain extensions H10D30/601)}
- H10P 14/3802: {Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth}
- H10P 14/24: using chemical vapour deposition [CVD]
- H10P 14/3411: {Silicon, silicon germanium or germanium}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method for forming a fin field effect transistor device structure includes forming a fin structure over a substrate. The method also includes forming an isolation structure surrounding the fin structure. The method also includes cleaning sidewalls of the fin structure. The method also includes depositing a silicon cap layer over the fin structure. The method also includes growing an oxide layer over the silicon cap layer. The silicon cap layer is thinned after growing an oxide layer over the silicon cap layer. The method also includes forming a gate structure over the oxide layer across the fin structure. The method also includes growing a source/drain epitaxial structure beside the gate structure. The method also includes forming a contact structure electrically connected to the gate structure.

## Claims

### Claim 1

A method for forming a fin field effect transistor device structure, comprising:
forming a fin structure over a substrate;
forming an isolation structure surrounding the fin structure;
cleaning sidewalls of the fin structure;
depositing a silicon cap layer over the fin structure;
growing an oxide layer over the silicon cap layer, wherein the silicon cap layer is thinned after growing an oxide layer over the silicon cap layer;
forming a gate structure over the oxide layer across the fin structure;
growing a source/drain epitaxial structure beside the gate structure; and
forming a contact structure electrically connected to the gate structure.

### Claim 2 (depends on 1)

The method for forming the fin field effect transistor device structure as claimed in claim 1, further comprising:
trimming the fin structure to narrow the fin structure,
wherein the isolation structure is vertically recessed after trimming the fin structure.

### Claim 3 (depends on 2)

The method for forming the fin field effect transistor device structure as claimed in claim 2, wherein after trimming the fin structure, the fin structure has a curved sidewall adjacent to the top surface of the isolation structure.

### Claim 4 (depends on 1)

The method for forming the fin field effect transistor device structure as claimed in claim 1, wherein after cleaning the sidewalls of the fin structure, the fin structure has a protruding portion adjacent to the top surface of the isolation structure.

### Claim 5 (depends on 1)

The method for forming the fin field effect transistor device structure as claimed in claim 1, further comprising:
forming an amorphous portion of the silicon cap layer over the isolation structure, wherein the amorphous portion of the silicon cap layer is in contact with the silicon cap layer over the fin structure.

### Claim 6 (depends on 5)

The method for forming the fin field effect transistor device structure as claimed in claim 5, wherein while forming an amorphous portion of the silicon cap layer over the isolation structure, the silicon cap layer over the fin structure is crystallized.

### Claim 7 (depends on 5)

The method for forming the fin field effect transistor device structure as claimed in claim 5, further comprising:
re-crystallizing the amorphous portion of the silicon cap layer to a poly-crystalline portion of the silicon cap layer.

### Claim 8

A method for forming a fin field effect transistor device structure, comprising:
forming a fin structure protruding from a substrate;
forming a liner layer and an isolation structure surrounding the fin structure;
recessing the liner layer and the isolation structure;
growing a cap layer over the fin structure;
forming a first gate dielectric layer covering the cap layer, the liner layer, and the isolation structure, wherein a portion of the cap layer is consumed;
forming a gate structure over the first gate dielectric layer across the fin structure;
growing source/drain epitaxial structures on opposite sides of the gate structure; and
forming a contact structure over the gate structure.

### Claim 9 (depends on 8)

The method for forming the fin field effect transistor device structure as claimed in claim 8, wherein the cap layer and the fin structure are made of the same material.

### Claim 10 (depends on 8)

The method for forming the fin field effect transistor device structure as claimed in claim 8, wherein the cap layer has a first thickness before forming a first gate dielectric layer, the cap layer has a second thickness after forming a first gate dielectric layer, and the first thickness is greater than the second thickness.

### Claim 11 (depends on 8)

The method for forming the fin field effect transistor device structure as claimed in claim 8, wherein the cap layer has a protruding portion covering the liner layer and the isolation structure.

### Claim 12 (depends on 8)

The method for forming the fin field effect transistor device structure as claimed in claim 8, wherein the source/drain epitaxial structures are formed over the cap layer adjacent to the isolation structure.

### Claim 13 (depends on 8)

The method for forming the fin field effect transistor device structure as claimed in claim 8, further comprising:
removing the first gate dielectric layer and recessing the liner layer and the isolation structure; and
forming a second gate dielectric layer covering the fin structure and the isolation structure,
wherein the cap layer protrudes from a sidewall of the fin structure.

### Claim 14

A fin field effect transistor device structure, comprising:
a fin structure formed over a substrate;
a liner layer and an isolation structure surrounding the fin structure;
a gate dielectric layer formed over the fin structure and the isolation structure;
a gate structure formed over the gate dielectric layer; and
source/drain epitaxial structures formed on opposite sides of the gate structure;
wherein the fin structure comprises a protruding portion laterally extending over the liner layer.

### Claim 15 (depends on 14)

The fin field effect transistor device structure as claimed in claim 14, wherein a bottom surface of the protruding portion of the fin structure is in direct contact with a top surface of the liner layer.

### Claim 16 (depends on 14)

The fin field effect transistor device structure as claimed in claim 14,
wherein the fin structure comprises:
a bottom portion with a first dopant concentration;
a middle portion with the first dopant concentration; and
a top portion with a second dopant concentration;
wherein the first dopant concentration is higher than the second concentration, and the protruding portion of the fin structure protrudes from a sidewall of the middle portion.

### Claim 17 (depends on 16)

The fin field effect transistor device structure as claimed in claim 16, wherein a width of the middle portion of the fin structure is wider than a width of the bottom portion of the fin structure, and the width of the middle portion of the fin structure is wider than the width of the top portion of the fin structure.

### Claim 18 (depends on 17)

The fin field effect transistor device structure as claimed in claim 17, wherein the middle portion of the fin structure has a curved top surface above the top surface of the liner layer.

### Claim 19 (depends on 14)

The fin field effect transistor device structure as claimed in claim 14, wherein the protruding portion of the fin structure over the liner layer is poly-crystalline.

### Claim 20 (depends on 14)

The fin field effect transistor device structure as claimed in claim 14, wherein a portion of the gate dielectric layer is sandwiched between the protruding portion of the fin structure and the liner layer.
