# US 2021/0242301 A1 · Display device

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- Number: US 2021/0242301 A1
- Document ID: US20210242301A1
- Status: Published application
- Kind: A1
- Application number: 17/238,991
- Filed: 2021-04-23
- Published: 2021-08-05
- Earliest claimed: 2016-05-17
- Assignees: Samsung Display Co., Ltd.
- Applicants: Samsung Display Co., Ltd.
- Inventors: Seung Kyu LEE; Yang Wan KIM; Sun Ja KWON; Byung Sun KIM; Hyun Ae PARK; Su Jin LEE; Jae Yong LEE; Tae Hoon KWON; Seung Ji CHA
- Web page: https://patentgrep.com/patent/US20210242301A1

## CPC

- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- G09G 3/3225: using an active matrix
- H10K 59/1213: {the pixel elements being TFTs}
- H10K 59/123: Connection of the pixel electrodes to the thin film transistors [TFT]
- H10K 59/131: Interconnections, e.g. wiring lines or terminals
- H10K 59/873: {Encapsulations}
- G09G 2300/0408: Integration of the drivers onto the display substrate
- G09G 2300/0426: Layout of electrodes and connections
- G09G 2300/0439: Pixel structures
- G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing
- G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
- G09G 2310/0251: Precharge or discharge of pixel before applying new pixel voltage
- G09G 2310/0262: The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
- G09G 2310/0286: Details of a shift registers arranged for use in a driving circuit
- G09G 2320/0223: Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
- G09G 2330/021: Power management, e.g. power saving
- G09G 2330/04: Display protection
- H10K 59/8722: {Peripheral sealing arrangements, e.g. adhesives, sealants}
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

A display device includes a substrate having a pixel area with at least a first rounded corner portion and first to third non-pixel areas arranged sequentially along an outer circumference of the pixel area. An internal circuit in the first non-pixel area has a first end portion adjacent to the first rounded corner portion of the pixel area. The first end portion of the internal circuit is rounded in accordance with the first rounded corner portion. A plurality of routing wires are in the third non-pixel area below the pixel area. The routing wires extending to the pixel area via the second non-pixel area and the first non-pixel area. The routing wires include at least a first routing wire connected to the pixel area passing an area of the first end portion of the internal circuit.

## Claims

### Claim 1

A display device, comprising:
a substrate including a pixel area with at least a top portion, a bottom portion, a first side portion, and a second side portion, wherein the top portion, the bottom portion, the first side portion, and the second side portion are disposed about a center of the pixel area in a plan view of the display device;
a plurality of pixels in the pixel area;
a first rounded corner of the pixel area between the bottom portion and the first side portion in the plan view of the display device;
a first non-pixel area, a second non-pixel area and a third non-pixel area arranged sequentially along an outer circumference of the pixel area, with the first non-pixel area being closest to the pixel area;
a first internal circuit in the first non-pixel area that includes a plurality of first stages to sequentially output a pixel control signal, the first internal circuit having a first end adjacent to the first rounded corner of the pixel area, the first end of the first internal circuit rounded in accordance with the first rounded corner; and
a plurality of routing wires extending from a data driver located in a portion of the third non-pixel area that is below the pixel area in the plan view of the display device, the routing wires extending to the pixel area via the second non-pixel area and the first non-pixel area, the routing wires including a first routing wire connected to the pixel area that passes between a first stage and an adjacent second stage, which are both located in the first end of the first internal circuit, wherein the routing wires are data lines.