# US 2021/0242287 A1 · Integration of microdevices into system substrate

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- Number: US 2021/0242287 A1
- Document ID: US20210242287A1
- Status: Published application
- Kind: A1
- Application number: 17/218,589
- Filed: 2021-03-31
- Published: 2021-08-05
- Earliest claimed: 2016-11-25
- Assignees: VueReal Inc.
- Applicants: VueReal Inc.
- Inventors: Gholamreza Chaji; Ehsanollah Fathi
- Web page: https://patentgrep.com/patent/US20210242287A1

## CPC

- H10P 72/74: {using temporarily an auxiliary support}
- H10K 59/121: characterised by the geometry or disposition of pixel elements
- H10K 59/122: Pixel-defining structures or layers, e.g. banks
- H10K 59/38: comprising colour filters or colour changing media [CCM]
- H10K 71/221: {by lift-off techniques}
- H10K 71/40: Thermal treatment, e.g. annealing in the presence of a solvent vapour
- H10W 90/00: Package configurations
- G01R 31/2635: {Testing light-emitting diodes, laser diodes or photodiodes}
- H10P 72/7414: {the auxiliary support including means facilitating the selective separation of some of a plurality of devices from the auxiliary support}
- H10P 72/7434: {used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate}
- H10P 72/744: {Details of chemical or physical process used for separating the auxiliary support from a device or a wafer}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)

## Abstract

A method of manufacturing a pixelated structure may be provided. The method may comprise providing a donor substrate comprising the plurality of pixelated microdevices, bonding a selective set of the pixelated microdevices from the donor substrate to a system substrate; and patterning a bottom conductive layer of the pixelated microdevices after separating the donor substrate from the system substrate. The patterning may be done by fully isolating the layers or leaving some thin layers between the patterns.

## Claims

### Claim 1

A method of manufacturing a pixelated structure comprising:
providing a donor substrate comprising a plurality of pixelated microdevices;
bonding a selective set of the plurality of pixelated microdevices from the donor substrate to a system substrate; and
patterning at least one bottom planar layer of the plurality of pixelated microdevices after separating the donor substrate from the system substrate,
wherein the at least one bottom planar layer comprises one of: a bottom conductive layer or a bottom doped layer.

### Claim 2 (depends on 1)

The method of claim 1, wherein patterning the at least one bottom planar layer comprises making isolated patterns of the at least one bottom planar layer.

### Claim 3 (depends on 2)

The method of claim 2, further comprising providing ohmic contacts to the isolated patterns of the at least one bottom planar layer, wherein the ohmic contacts are transparent material or opaque.

### Claim 4 (depends on 3)

The method of claim 3, wherein the ohmic contacts are patterned in case the ohmic contacts are opaque to provide a path for light.

### Claim 5 (depends on 4)

The method of claim 4, wherein providing ohmic contacts to the isolated patterns of the at least one bottom planar layer comprises providing the ohmic contacts inside the isolated patterns of the at least one bottom planar layer.

### Claim 6 (depends on 2)

The method of claim 2, wherein providing ohmic contacts to the isolated patterns of the at least one bottom planar layer comprises providing the ohmic contacts at an edge of the isolated patterns of the at least one bottom planar layer.

### Claim 7 (depends on 2)

The method of claim 2, further comprising depositing a patterned dielectric layer between the isolated patterns of the at least one bottom planar Layer.

### Claim 8 (depends on 1)

The method of claim 1, further comprising:
bonding a selective set of pixelated micro devices from the donor substrate to a system substrate by depositing a pad for each pixelated microdevice in each opening of a dielectric layer; and
bonding contacts pads of the system substrate with pads of selected pixelated microdevices,
wherein the contact pads of the system substrate are separated by the dielectric layer.

### Claim 9 (depends on 8)

The method of claim 8, wherein the bonding between the contacts pads of the system substrate with pads of selected pixelated microdevices is employed by one of: fusion bonding, anodic bonding, thermocompression bonding, eutectic bonding, or adhesive bonding.

### Claim 10 (depends on 8)

The method of claim 8, wherein a plurality of other layers is deposited between the contact pads and the system substrate.

### Claim 11 (depends on 10)

The method of claim 10, wherein the plurality of other layers comprises circuit layers, planarization layers, and conductive traces.