# US 2021/0242254 A1 · Solid-state imaging device and solid-state imaging apparatus

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- Number: US 2021/0242254 A1
- Document ID: US20210242254A1
- Status: Published application
- Kind: A1
- Application number: 17/049,780
- Filed: 2019-04-08
- Published: 2021-08-05
- Earliest claimed: 2018-05-16
- Assignees: Sony Semiconductor Solutions Corporation
- Applicants: Sony Semiconductor Solutions Corporation
- Inventors: Hironobu FUKUI
- Web page: https://patentgrep.com/patent/US20210242254A1

## CPC

- H10F 39/802: {Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes}
- H10F 39/8023: {Disposition of the elements in pixels, e.g. smaller elements in the centre of the imager compared to larger elements at the periphery}
- H04N 25/77: Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
- H10D 84/00: Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D 84/0126: {the components including insulated gates, e.g. IGFETs}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10F 39/12: Image sensors
- H10F 39/18: Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
- H10F 39/8037: {the integrated elements comprising a transistor}
- H10F 39/807: {Pixel isolation structures}
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A solid-state imaging device including: a semiconductor substrate having a first surface and a second surface opposed to each other, and including a photoelectric converter provided for each of pixel regions; an impurity diffusion region provided, for each of the pixel regions, in proximity to the first surface of the semiconductor substrate; and a contact electrode embedded in the semiconductor substrate from the first surface, and provided over and in contact with the impurity diffusion regions each provided for each of the pixel regions adjacent to each other.

## Claims

### Claim 1

A solid-state imaging device comprising:
a semiconductor substrate having a first surface and a second surface opposed to each other, and including a photoelectric converter provided for each of pixel regions;
an impurity diffusion region provided, for each of the pixel regions, in proximity to the first surface of the semiconductor substrate; and
a contact electrode embedded in the semiconductor substrate from the first surface, and provided over and in contact with the impurity diffusion regions each provided for each of the pixel regions adjacent to each other.

### Claim 2 (depends on 1)

The solid-state imaging device according to claim 1, further comprising a pixel separation groove provided between the pixel regions adjacent to each other, and penetrating through the semiconductor substrate from the first surface to the second surface.

### Claim 3 (depends on 2)

The solid-state imaging device according to claim 2, wherein the contact electrode is disposed at a position overlapping the pixel separation groove.

### Claim 4 (depends on 1)

The solid-state imaging device according to claim 1, wherein at least a portion of a side surface of the contact electrode and a bottom surface of the contact electrode are in contact with the impurity diffusion region.

### Claim 5 (depends on 1)

The solid-state imaging device according to claim 1, wherein the contact electrode includes an embedded portion embedded in the semiconductor substrate, and an exposed portion provided outside the semiconductor substrate.

### Claim 6 (depends on 5)

The solid-state imaging device according to claim 5, wherein a width of the exposed portion is equal to a width of the embedded portion.

### Claim 7 (depends on 5)

The solid-state imaging device according to claim 5, wherein the exposed portion is provided to have a wider width than the embedded portion.

### Claim 8 (depends on 1)

The solid-state imaging device according to claim 1, wherein the contact electrode is provided over and in contact with the impurity diffusion regions each provided for each of two pixel regions.

### Claim 9 (depends on 1)

The solid-state imaging device according to claim 1, wherein the contact electrode is provided over and in contact with the impurity diffusion regions each provided for each of four pixel regions.

### Claim 10 (depends on 1)

The solid-state imaging device according to claim 1, wherein the impurity diffusion region configures an electric charge accumulation section in which a signal electric charge generated in the photoelectric converter is accumulated.

### Claim 11 (depends on 1)

The solid-state imaging device according to claim 1, further comprising a transistor provided for each of the pixel regions adjacent to each other, wherein
the impurity diffusion region configures a source-drain region of the transistor.

### Claim 12 (depends on 11)

The solid-state imaging device according to claim 11, wherein the contact electrode is coupled to a VDD potential.

### Claim 13 (depends on 1)

The solid-state imaging device according to claim 1, wherein the impurity diffusion region includes a first impurity diffusion region in contact with the contact electrode, and a second impurity diffusion region that is disposed at a position farther than the first impurity diffusion region from the contact electrode and has an impurity concentration lower than an impurity concentration of the first impurity diffusion region.

### Claim 14 (depends on 1)

The solid-state imaging device according to claim 1, wherein the impurity diffusion region includes an n-type impurity diffusion region.

### Claim 15

A solid-state imaging apparatus provided with a solid-state imaging device, the solid-state imaging device comprising:
a semiconductor substrate having a first surface and a second surface opposed to each other, and including a photoelectric converter provided for each of pixel regions;
an impurity diffusion region provided, for each of the pixel regions, in proximity to the first surface of the semiconductor substrate; and
a contact electrode embedded in the semiconductor substrate from the first surface, and provided over and in contact with the impurity diffusion regions each provided for each of the pixel regions adjacent to each other.
