# US 2021/0242038 A1 · Universal semiconductor package molds

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- Number: US 2021/0242038 A1
- Document ID: US20210242038A1
- Status: Published application
- Kind: A1
- Application number: 17/238,151
- Filed: 2021-04-22
- Published: 2021-08-05
- Earliest claimed: 2019-08-06
- Assignees: Texas Instruments Incorporated
- Applicants: Texas Instruments Incorporated
- Inventors: Anis Fauzi BIN ABDUL AZIZ; Chong Han LIM; Lee Han Meng@Eugene LEE; Wei Fen Sueann LIM
- Web page: https://patentgrep.com/patent/US20210242038A1

## CPC

- H10W 74/016: {using moulds}
- B29C 33/0022: {Multi-cavity moulds (B29C33/301 takes precedence)}
- B29C 33/44: with means for, or specially constructed to facilitate, the removal of articles, e.g. of undercut articles
- B29C 45/14467: {Joining articles or parts of a single article (B29C45/14377, B29C45/14385, B29C45/14581, B29C45/14614 and B29C45/006 take precedence)}
- H10W 70/04: of leadframes
- H10W 70/442: {of multiple leadframes in a single chip}
- H10W 74/014: {using batch processing}
- H10W 74/111: {the semiconductor body being completely enclosed}
- H10W 70/429: {being the outer leads}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 74/10: characterised by their shape or disposition
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- B29C: SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING (making preforms B29B11/00; making laminated products by combining previously unconnected layers which become one product whose layers will remain together B32B37/00 - B32B41/00)

## Abstract

In accordance with at least one example of the disclosure, a system comprises a semiconductor package, comprising a first side surface having a first set of metal contacts extending therefrom; a second side surface having a second set of metal contacts extending therefrom; a top surface; a bottom surface; and an end surface meeting at least one of the first side surface, the second side surface, the top surface, and the bottom surface at a non-rounded edge.

## Claims

### Claim 1

A method of forming a semiconductor package, comprising:
providing a first lead frame having a first plurality of semiconductor dies arranged along a first longitudinal axis, each of the first plurality of semiconductor dies having a first number of metal contacts;
providing a second lead frame having a second plurality of semiconductor dies arranged along a second longitudinal axis, each of the second plurality of semiconductor dies having a second number of metal contacts; and
encapsulating the first plurality of semiconductor dies in a first mold using a common semiconductor die cavity;
encapsulating the second plurality of semiconductor dies in a second mold using the common semiconductor die cavity.

### Claim 2 (depends on 1)

The method of claim 1, further comprising singulating the first mold to produce a first plurality of semiconductor packages, each of the first plurality of semiconductor packages comprising a different one of the first plurality of semiconductor dies.

### Claim 3 (depends on 1)

The method of claim 1, further comprising singulating the second mold to produce a second plurality of semiconductor packages, each of the second plurality of semiconductor packages comprising a different one of the second plurality of semiconductor dies.

### Claim 4 (depends on 2)

The method of claim 2, wherein each of the first plurality of semiconductor packages includes:
a first side surface having a first set of metal contacts extending therefrom;
a second side surface having a second set of metal contacts extending therefrom;
a top surface;
a bottom surface; and
a first end surface meeting at least one of the first side surface, the second side surface, the top surface, and the bottom surface at a first set of non-rounded edges.

### Claim 5 (depends on 3)

The method of claim 3, wherein each of the first plurality of semiconductor packages includes:
a first side surface having a first set of metal contacts extending therefrom;
a second side surface having a second set of metal contacts extending therefrom;
a top surface;
a bottom surface; and
a first end surface meeting at least one of the first side surface, the second side surface, the top surface, and the bottom surface at a first set of non-rounded edges.

### Claim 6 (depends on 4)

The method of claim 4, further comprising a second end surface opposite the first end surface, the second end surface meeting at least one of the first side surface, the second side surface, the top surface, and the bottom surface at non-rounded edges.

### Claim 7 (depends on 5)

The method of claim 5, further comprising a second end surface opposite the first end surface, the second end surface meeting at least one of the first side surface, the second side surface, the top surface, and the bottom surface at non-rounded edges.

### Claim 8 (depends on 4)

The method of claim 4, wherein the first end surface forms an approximately 90 degree angle with at least one of the first side surface, the second side surface, the top surface, and the bottom surface.

### Claim 9 (depends on 5)

The method of claim 5, wherein the first end surface forms an approximately 90 degree angle with at least one of the first side surface, the second side surface, the top surface, and the bottom surface.

### Claim 10 (depends on 4)

The method of claim 4, wherein the first end surface forms an angle greater than 90 degrees with at least one of the first side surface, the second side surface, the top surface, and the bottom surface.

### Claim 11 (depends on 5)

The method of claim 5, wherein the first end surface forms an angle greater than 90 degrees with at least one of the first side surface, the second side surface, the top surface, and the bottom surface.

### Claim 12 (depends on 2)

The method of claim 2, wherein the first plurality of semiconductor packages comprises gullwing leads.

### Claim 13 (depends on 3)

The method of claim 3, wherein the second plurality of semiconductor packages comprises gullwing leads.

### Claim 14

A semiconductor packaging system, comprising:
a semiconductor packaging mold, comprising:
a mold compound storage cavity;
a plurality of semiconductor die cavities, each semiconductor die cavity configured to accommodate multiple semiconductor dies along a longitudinal axis of the semiconductor die cavity and further configured to accommodate a mold compound such that the mold compound abuts the multiple semiconductor dies; and
a plurality of runner cavities extending from the mold compound storage cavity to the plurality of semiconductor die cavities.

### Claim 15 (depends on 14)

The system of claim 14, further comprising a second semiconductor packaging mold comprising a second plurality of semiconductor die cavities.

### Claim 16 (depends on 14)

The system of claim 14, wherein each of the plurality of semiconductor die cavities includes rounded edges.

### Claim 17 (depends on 14)

The system of claim 14, wherein each of the plurality of semiconductor die cavities includes a pair of surfaces meeting at an angle less than 90 degrees.
