# US 2021/0242035 A1 · Methods for processing semiconductor wafers having a polycrystalline finish

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- Number: US 2021/0242035 A1
- Document ID: US20210242035A1
- Status: Published application
- Kind: A1
- Application number: 17/234,101
- Filed: 2021-04-19
- Published: 2021-08-05
- Earliest claimed: 2015-09-30
- Assignees: GlobalWafers Co., Ltd.
- Applicants: GlobalWafers Co., Ltd.
- Inventors: Alexis Grabbe; Hui Wang; Alex Chu
- Web page: https://patentgrep.com/patent/US20210242035A1

## CPC

- H10P 52/403: {of conductive or resistive materials}
- C09G 1/02: containing abrasives or grinding agents {(abrasives as such C09K3/14; polishing of semi-conductors H10P52/40)}
- H10P 14/3411: {Silicon, silicon germanium or germanium}
- H10P 14/3456: {Polycrystalline}
- H10P 70/277: {the processing being a planarisation of conductive layers}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- C09G: POLISHING COMPOSITIONS (French polish C09F11/00); SKI WAXES

## Abstract

A method of processing a semiconductor wafer includes depositing a silicon layer on the semiconductor wafer. A first slurry is applied to the semiconductor wafer and the silicon layer is polished to smooth the silicon layer. A second slurry is applied to the semiconductor wafer. The second slurry includes a greater amount of a caustic agent than the first slurry.

## Claims

### Claim 1

A method of processing a semiconductor wafer comprising:
depositing a silicon layer on the semiconductor wafer;
positioning the semiconductor wafer on a circular polishing pad of a first wafer polishing apparatus;
polishing the silicon layer with a first slurry while the semiconductor wafer is positioned on the circular polishing pad of the first wafer polishing apparatus while the circular polishing pad rotates such that a first portion of the silicon layer is removed, the first slurry being free of caustic agent;
positioning the semiconductor wafer on a second wafer polishing apparatus; and
polishing the silicon layer with a second slurry comprising a caustic agent while the semiconductor wafer is positioned on the second wafer polishing apparatus such that a second portion of the silicon layer is removed.

### Claim 2 (depends on 1)

The method of claim 1 wherein between about 0.3 um and about 1 um of the thickness of the silicon layer is removed while the silicon layer is polished on the first wafer polishing apparatus.

### Claim 3 (depends on 1)

The method of claim 1 wherein between about 0.1 um and about 0.5 um of the thickness of the silicon layer is removed while the silicon layer is polished on the second wafer polishing apparatus.

### Claim 4 (depends on 1)

The method of claim 1 wherein the silicon layer is polished using the first slurry for a predetermined time, the predetermined time being in the range between about 1 minute and about 5 minutes.

### Claim 5 (depends on 4)

The method of claim 4 wherein predetermined time is approximately 2 minutes.

### Claim 6 (depends on 1)

The method of claim 1 wherein the silicon layer is polished using the second slurry for a predetermined time, the predetermined time being in the range between about 5 minutes and about 15 minutes.

### Claim 7 (depends on 1)

The method of claim 1 wherein the caustic agent is potassium hydroxide.

### Claim 8 (depends on 1)

The method of claim 1 further comprising forming a silicon oxide layer on the silicon layer prior to polishing the silicon layer.