# US 2021/0242029 A1 · Patterning platinum by alloying and etching platinum alloy > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0242029 A1 - Document ID: US20210242029A1 - Status: Published application - Kind: A1 - Application number: 17/234,833 - Filed: 2021-04-20 - Published: 2021-08-05 - Earliest claimed: 2018-07-27 - Assignees: Texas Instruments Incorporated - Applicants: Texas Instruments Incorporated - Inventors: Sebastian Meier; Helmut Rinck - Web page: https://patentgrep.com/patent/US20210242029A1 ## CPC - H10P 50/642: {Chemical etching} - H10P 50/667: {by liquid etching only} - B81C 1/00539: {Wet etching} - C23F 1/02: Local etching - C23F 1/30: for etching other metallic material - C23F 1/44: Compositions for etching metallic material from a metallic material substrate of different composition - G01K 7/18: the element being a linear resistance, e.g. platinum resistance thermometer (G01K7/26 takes precedence) - G01N 27/30: Electrodes, e.g. test electrodes; Half-cells (G01N27/414 takes precedence) - H10P 50/692: {characterised by their composition, e.g. multilayer masks or materials} - H10P 50/71: {using masks for conductive or resistive materials} - H10P 95/50: {Alloying conductive materials with semiconductor bodies} - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 - B81C: PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS (making microcapsules or microballoons B01J13/02; processes or apparatus specially adapted for the manufacture or treatment of piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/01) - C23F: NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE (working metal by laser beams B23K26/00; desurfacing by applying flames B23K7/00; working of metal by electro-erosion B23H; producing decorative effects by removing surface material, e.g. by engraving, by etching, B44C1/22; electrolytic etching or polishing C25F); INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25 - G01K: MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR (radiation pyrometry G01J5/00) - G01N: INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES (measuring or testing apparatus or processes other than immunoassay, involving enzymes or microorganisms C12M, C12Q) ## Abstract There is provided a method of patterning platinum on a substrate. A platinum layer is deposited on the substrate, and a patterned photoresist layer is formed over the platinum layer leaving partly exposed regions of the platinum layer. An aluminum layer is deposited over the partly exposed regions of the platinum layer. An alloy is formed of aluminum with platinum from the partly exposed regions. The platinum aluminum alloy is etched away leaving a remaining portion of the platinum layer to form a patterned platinum layer on the substrate. In an embodiment, a thin hard mask layer is deposited on the platinum layer on the semiconductor substrate before the patterned photoresist layer is formed. ## Claims ### Claim 1 A method of forming a microelectronic device, comprising: providing a substrate having a top surface; forming a layer of a first metal on the top surface of the substrate; forming a patterned photoresist layer over the layer of first metal leaving an exposed region in the layer of first metal; forming a layer of second metal over the exposed region in the layer of first metal; forming an alloy of the first and the second metals at the exposed region of the layer of the first metal; and etching the layer of first metal, and the alloyed first and second metals, at the exposed region of the layer of first metal, thereby leaving a remaining portion of the layer of first metal to form a patterned layer of first metal on the substrate; wherein the first metal is an inert metal and the second metal is a metal that readily forms an etchable alloy with the inert metal, and wherein the etchable alloy has a greater susceptibility to etching than the inert metal. ### Claim 2 (depends on 1) The method of claim 1, wherein the step of etching the layer of first metal, and the alloyed first and second metals is performed with a selective wet etch process. ### Claim 3 A method of forming a microelectronic device, comprising depositing a platinum layer on a semiconductor substrate; forming a patterned photoresist layer over the platinum layer leaving an exposed region in the platinum layer; depositing a metal layer over the platinum layer and the exposed region; forming an alloy of metal and platinum in the exposed region of the platinum layer; and etching the metal layer and the alloyed metal and platinum at the exposed region of the platinum layer, thereby leaving a remaining portion of the platinum layer to form a patterned platinum layer on the substrate. ### Claim 4 (depends on 3) The method of claim 3, wherein etching of the metal layer and the alloyed metal and platinum in the exposed region of the platinum layer comprises a wet etch immersion bath process using a dilute aqua regia, 3HCL:HNO3+H2O, etchant. ### Claim 5 (depends on 3) The method of claim 3, wherein etching of the metal layer and the alloyed metal and platinum in the exposed region of the platinum layer comprises a wet etch spray tool process using a dilute etchant of 3:1 HCl:H2O2. ### Claim 6 (depends on 3) The method of claim 3, further comprising forming a thin hard mask layer on the platinum layer on the semiconductor substrate before the patterned photoresist layer is formed. ### Claim 7 (depends on 6) The method of claim 6, wherein the thin hard mask layer is formed by: plasma-enhanced chemical vapor deposition, PECVD, of SiO2, and performing a wet etch to pattern the thin hard mask according to the patterned photoresist layer, and to remove the photoresist layer. ### Claim 8 (depends on 3) The method of claim 3, wherein depositing the metal layer over the platinum layer and the exposed region comprises performing a sputter deposition process. ### Claim 9 (depends on 3) The method of claim 3, wherein forming an alloy of metal and platinum at the exposed region of the platinum layer comprises annealing in a nitrogen atmosphere to form the alloy at the exposed region of the platinum layer. ### Claim 10 (depends on 3) The method of claim 3, further comprising forming an adhesive layer over the semiconductor substrate, and before the depositing the platinum layer. ### Claim 11 (depends on 10) The method of claim 10, wherein the adhesive layer comprises aluminum oxide, Al2O3. ### Claim 12 (depends on 3) The method of claim 3, wherein depositing the platinum layer on the substrate includes performing a sputter deposition process. ### Claim 13 (depends on 12) The method of claim 12, wherein the platinum layer has a thickness of 0.4 μm and the metal layer has a thickness of 0.8 μm or thicker. ### Claim 14 (depends on 7) The method of claim 7, further comprising removing the thin hard mask layer by performing a dip in HF or BHF. ### Claim 15 A microelectronic device, comprising: a semiconductor substrate; and a platinum electrode on a top surface of the substrate, wherein the platinum electrode has a thickness of ≥0.1 μm. ### Claim 16 (depends on 15) The microelectronic device of claim 15, wherein the platinum electrode has a thickness of ≥0.4 μm. ### Claim 17 (depends on 15) The microelectronic device of claim 15, wherein the platinum electrode has a thickness in the range of ≥0.1 μm. to 1 μm. ### Claim 18 (depends on 15) The microelectronic device of claim 15, wherein the microelectronic device is an electrochemical sensor. ### Claim 19 (depends on 15) The microelectronic device of claim 15, wherein the microelectronic device is a resistance thermometer device, RTD.