# US 2021/0242028 A1 · Method for manufacturing pillar-shaped semiconductor device

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- Number: US 2021/0242028 A1
- Document ID: US20210242028A1
- Status: Published application
- Kind: A1
- Application number: 17/215,566
- Filed: 2021-03-29
- Published: 2021-08-05
- Earliest claimed: 2018-10-01
- Assignees: Unisantis Electronics Singapore Pte. Ltd.
- Applicants: Unisantis Electronics Singapore Pte. Ltd.
- Inventors: Fujio MASUOKA; Nozomu HARADA
- Web page: https://patentgrep.com/patent/US20210242028A1

## CPC

- H10P 50/694: {characterised by their behaviour during the process, e.g. soluble masks or redeposited masks}
- H10B 10/12: {comprising a MOSFET load element}
- H10D 30/025: {of vertical IGFETs (of VDMOS H10D30/0291; of vertical TFTs H10D30/0318)}
- H10D 30/63: Vertical IGFETs (H10D30/66 {, H10D30/6728, H10D30/689, H10D30/693} take precedence)
- H10D 30/751: {having composition variations in the channel regions}
- H10D 89/10: Integrated device layouts
- H10P 14/3451: {Structure}
- H10D 62/122: {oriented at angles to substrates, e.g. perpendicular to substrates}
- H10D 84/0195: {the components including vertical IGFETs}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10P 50/693: {characterised by their size, orientation, disposition, behaviour or shape, in horizontal or vertical plane}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10B: ELECTRONIC MEMORY DEVICES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A band-shaped Si pillar having a mask material layer on the top portion thereof is formed on a P+ layer. SiGe layers having mask material layers on the top portions thereof are then formed in contact with the side surfaces of the band-shaped Si pillar and the surfaces of N+ layers and the P+ layer. Si layers having mask material layers on the top portions thereof are then formed in contact with the side surfaces of the SiGe layers and the surfaces of the N+ layers. The outer peripheries of the bottom portions of the Si layers are then removed using the mask material layers as a mask to form band-shaped Si pillars. The mask material layers and the SiGe layers are then removed. Si pillars separated in the Y direction are then formed in the band-shaped Si pillars.

## Claims

### Claim 1

A method for manufacturing a pillar-shaped semiconductor device, comprising the steps of:
forming a first mask material layer extending in a band shape in one direction in plan view on a semiconductor layer on a substrate;
etching the semiconductor layer using the first mask material layer as a mask to form a first band-shaped semiconductor pillar;
forming a first material layer so as to cover the first mask material layer, the first band-shaped semiconductor pillar, and a portion of the substrate around an outer periphery of the first band-shaped semiconductor pillar;
forming a second material layer so as to cover the first material layer;
planarizing the first material layer and the second material layer such that upper surfaces thereof are located at the same height as an upper surface of the first mask material layer;
etching a top portion of the first material layer using the first mask material layer and the second material layer as a mask to form first recesses;
forming a second mask material layer so as to fill the first recesses above the top portion of the first material layer and such that an upper surface of the second mask material layer is located at the same height as the upper surface of the first mask material layer;
removing the second material layer;
etching the first material layer using the first mask material layer and the second mask material layer as a mask to form a first band-shaped material pillar and a second band-shaped material pillar based on the first material layer on both sides of the first band-shaped semiconductor pillar in plan view;
forming a first semiconductor layer so as to cover the first mask material layer, the second mask material layer, the first band-shaped semiconductor pillar, the first band-shaped material pillar, the second band-shaped material pillar, and the substrate;
forming a third material layer so as to cover the first semiconductor layer;
planarizing the first semiconductor layer and the third material layer such that upper surfaces thereof are located at the same height as the upper surface of the first mask material layer;
etching a top portion of the first semiconductor layer using the first mask material layer, the second mask material layer, and the third material layer as a mask to form second recesses;
forming a third mask material layer so as to fill the second recesses above the top portion of the first semiconductor layer and such that an upper surface of the third mask material layer is located at the same height as the upper surface of the first mask material layer;
removing the third material layer;
etching the first semiconductor layer using the first mask material layer, the second mask material layer, and the third mask material layer as a mask to form a second band-shaped semiconductor pillar and a third band-shaped semiconductor pillar based on the first semiconductor layer outside the first band-shaped material pillar and the second band-shaped material pillar in plan view;
removing the first band-shaped material pillar and the second band-shaped material pillar;
forming a fourth material layer around outer peripheries of the first band-shaped semiconductor pillar, the second band-shaped semiconductor pillar, and the third band-shaped semiconductor pillar such that an upper surface of the fourth material layer is located at the same height as the upper surface of the first mask material layer;
forming a fourth mask material layer extending in a band shape on the first mask material layer, the third mask material layer, and the fourth material layer in a direction perpendicular to the direction in which the first mask material layer extends in a band shape in plan view; and
etching the first band-shaped semiconductor pillar, the second band-shaped semiconductor pillar, and the third band-shaped semiconductor pillar using the fourth mask material layer as a mask to form a first semiconductor pillar, a second semiconductor pillar, and a third semiconductor pillar,
wherein pillar-shaped semiconductor devices having channels in the first semiconductor pillar, the second semiconductor pillar, and the third semiconductor pillar are formed.

### Claim 2 (depends on 1)

The method for manufacturing a pillar-shaped semiconductor device according to claim 1, wherein
the second band-shaped semiconductor pillar and the third band-shaped semiconductor pillar are formed from a second semiconductor base different from a first semiconductor base for the first band-shaped semiconductor pillar.

### Claim 3 (depends on 1)

The method for manufacturing a pillar-shaped semiconductor device according to claim 1, wherein
one of the first mask material layer and the second mask material layer is formed so as to be wider than the other in plan view.

### Claim 4 (depends on 1)

The method for manufacturing a pillar-shaped semiconductor device according to claim 1, wherein
one of the first mask material layer and the third mask material layer is formed so as to be wider than the other in plan view.

### Claim 5 (depends on 1)

The method for manufacturing a pillar-shaped semiconductor device according to claim 1, wherein
one of the first mask material layer and the fourth mask material layer is formed so as to be wider than the other in plan view.

### Claim 6 (depends on 1)

The method for manufacturing a pillar-shaped semiconductor device according to claim 1, comprising the steps of:
forming a gate insulating layer so as to surround side surfaces of the first semiconductor pillar, the second semiconductor pillar, and the third semiconductor pillar; and
forming a gate conductor layer so as to surround the gate insulating layer,
wherein the gate conductor layer is formed so as to fill spaces between the first semiconductor pillar, the second semiconductor pillar, and the third semiconductor pillar.

### Claim 7 (depends on 6)

The method for manufacturing a pillar-shaped semiconductor device according to claim 6, wherein
a semiconductor layer containing a donor or acceptor impurity is formed by epitaxial growth, the semiconductor layer covering top portions of the first semiconductor pillar, the second semiconductor pillar, and the third semiconductor pillar, or having a lower end thereof located at an upper portion of the gate conductor layer in a perpendicular direction and being in contact with and connected to the side surfaces of the first semiconductor pillar, the second semiconductor pillar, and the third semiconductor pillar.

### Claim 8 (depends on 1)

The method for manufacturing a pillar-shaped semiconductor device according to claim 1, comprising the steps of:
forming a fifth material layer around the outer peripheries of the first band-shaped semiconductor pillar, the second band-shaped semiconductor pillar, and the third band-shaped semiconductor pillar such that an upper surface of the fifth material layer is located at the same height as the upper surface of the first mask material layer;
forming a third band-shaped material pillar having a fifth mask material layer on a top portion thereof on the first mask material layer, the third mask material layer, and the fifth material layer, the third band-shaped material pillar being perpendicular to the first band-shaped semiconductor pillar in plan view;
forming a fourth band-shaped material pillar having a sixth mask material layer on a top portion thereof on one side of the third band-shaped material pillar and a fifth band-shaped material pillar having a seventh mask material layer on a top portion thereof on the other side of the third band-shaped material pillar;
removing the fifth mask material layer and the third band-shaped material pillar; and
etching the first band-shaped semiconductor pillar, the second band-shaped semiconductor pillar, and the third band-shaped semiconductor pillar using one or both of the sixth mask material layer and the fourth band-shaped material pillar as a mask to form the first semiconductor pillar, the second semiconductor pillar, and the third semiconductor pillar
while etching the first band-shaped semiconductor pillar, the second band-shaped semiconductor pillar, and the third band-shaped semiconductor pillar using one or both of the seventh mask material layer and the fifth band-shaped material pillar as a mask to form a fourth semiconductor pillar, a fifth semiconductor pillar, and a sixth semiconductor pillar in regions where the seventh mask material layer intersects the first band-shaped semiconductor pillar, the second band-shaped semiconductor pillar, and the third band-shaped semiconductor pillar in plan view,
wherein the sixth mask material layer and the seventh mask material layer have the same width in plan view.