# US 2021/0242016 A1 · Methods for pressure ramped plasma purge

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- Number: US 2021/0242016 A1
- Document ID: US20210242016A1
- Status: Published application
- Kind: A1
- Application number: 16/782,933
- Filed: 2020-02-05
- Published: 2021-08-05
- Earliest claimed: 2020-02-05
- Assignees: Applied Materials, Inc.
- Applicants: Applied Materials, Inc.
- Inventors: Madhu Santosh Kumar Mutyala; Sanjay Kamath; Deenesh Padhi
- Web page: https://patentgrep.com/patent/US20210242016A1

## CPC

- H10P 14/6336: {in the presence of a plasma [PECVD]}
- C23C 16/401: {containing silicon}
- C23C 16/50: using electric discharges {(generation and control of plasma in discharge tubes for surface treatment H01J37/32, H01J37/34)}
- H01J 37/32834: {Exhausting}
- H10P 14/6686: {the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane}
- H10P 14/69215: {the material being a silicon oxide, e.g. SiO2}
- H01J 2237/3321: CVD [Chemical Vapor Deposition]
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04)
- H01J: ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS (spark-gaps H01T; electric arc lamps H05B31/00; particle accelerators H05H)

## Abstract

Exemplary deposition methods may include forming a plasma of a silicon-containing precursor and at least one additional precursor within a processing region of a semiconductor processing chamber. The processing region may house a semiconductor substrate on a substrate support. The methods may include depositing material on the semiconductor substrate to a target thickness. The methods may include halting delivery of the silicon-containing precursor while maintaining the plasma with the one or more precursors. The methods may include purging the processing region of the semiconductor processing chamber.

## Claims

### Claim 1

A deposition method comprising:
forming a plasma of a silicon-containing precursor and at least one additional precursor within a processing region of a semiconductor processing chamber, wherein the processing region houses a semiconductor substrate on a substrate support;
depositing material on the semiconductor substrate to a target thickness;
halting delivery of the silicon-containing precursor while maintaining the plasma with the one or more precursors; and
purging the processing region of the semiconductor processing chamber.

### Claim 2 (depends on 1)

The deposition method of claim 1, wherein forming the plasma occurs at a first plasma power, and wherein maintaining the plasma further comprises:
reducing plasma power from the first plasma power to a second plasma power.

### Claim 3 (depends on 2)

The deposition method of claim 2, wherein the second plasma power is less than or about 1,000 W.

### Claim 4 (depends on 1)

The deposition method of claim 1, wherein the method further comprises delivering a blocking precursor from beneath the substrate support while depositing the material, the deposition method further comprising:
halting delivery of the blocking precursor during the purging of the processing region.

### Claim 5 (depends on 1)

The deposition method of claim 1, wherein the semiconductor substrate is positioned at a first distance from a faceplate during the depositing, the method further comprising:
lowering the semiconductor substrate to a second distance from the faceplate during the purging of the processing region.

### Claim 6 (depends on 1)

The deposition method of claim 1, wherein the silicon-containing precursor comprises tetraethyl orthosilicate.

### Claim 7 (depends on 1)

The deposition method of claim 1, wherein depositing material on the semiconductor substrate is performed at a first processing pressure, and wherein purging the processing region of the semiconductor processing chamber comprises:
reducing processing pressure from the first processing pressure to a second processing pressure over a period of time.

### Claim 8 (depends on 7)

The deposition method of claim 7, wherein reducing the processing pressure comprises reducing a flow rate of the at least one additional precursor.

### Claim 9 (depends on 8)

The deposition method of claim 8, wherein the flow rate of the at least one additional precursor is reduced in at least two steps, and wherein each step occurs over a portion of the period of time.

### Claim 10 (depends on 9)

The deposition method of claim 9, wherein each portion of the period of time is greater than or about two seconds.

### Claim 11 (depends on 7)

The deposition method of claim 7, wherein reducing the processing pressure comprises increasing an angle of a throttle valve of a purge line of the semiconductor processing chamber.

### Claim 12 (depends on 11)

The deposition method of claim 11, wherein the angle of a throttle valve of a purge line of the semiconductor processing chamber is increased in at least two steps, and wherein each step occurs over a portion of the period of time.

### Claim 13 (depends on 12)

The deposition method of claim 12, wherein each portion of the period of time is greater than or about two seconds.

### Claim 14

A deposition method comprising:
forming a plasma of a silicon-containing precursor and an oxygen-containing precursor within a processing region of a semiconductor processing chamber, wherein the processing region houses a semiconductor substrate on a substrate support;
depositing material on the semiconductor substrate to a target thickness, wherein the depositing is performed at a first processing pressure;
halting delivery of the silicon-containing precursor while maintaining the plasma with the oxygen-containing precursor; and
purging the processing region of the semiconductor processing chamber, wherein purging the processing region of the semiconductor processing chamber comprises:
reducing processing pressure from the first processing pressure to a second processing pressure over a period of time.

### Claim 15 (depends on 14)

The deposition method of claim 14, wherein reducing the processing pressure comprises reducing a flow rate of the oxygen-containing precursor.

### Claim 16 (depends on 15)

The deposition method of claim 15, wherein the period of time is greater than or about 5 seconds.

### Claim 17 (depends on 14)

The deposition method of claim 14, wherein reducing the processing pressure further comprises:
increasing an angle of a throttle valve of a purge line of the semiconductor processing chamber.

### Claim 18

A deposition method comprising:
forming a plasma of a silicon-containing precursor and an oxygen-containing precursor within a processing region of a semiconductor processing chamber, wherein the processing region houses a semiconductor substrate on a substrate support;
depositing material on the semiconductor substrate to a target thickness, wherein the depositing is performed at a first processing pressure;
halting delivery of the silicon-containing precursor while maintaining the plasma with the oxygen-containing precursor; and
purging the processing region of the semiconductor processing chamber, wherein purging the processing region of the semiconductor processing chamber comprises:
increasing an angle of a throttle valve of a purge line of the semiconductor processing chamber to reduce processing pressure from the first processing pressure to a second processing pressure over a period of time.

### Claim 19 (depends on 18)

The deposition method of claim 18, wherein the period of time is greater than or about 5 seconds.

### Claim 20 (depends on 18)

The deposition method of claim 18, wherein reducing the processing pressure further comprises:
reducing a flow rate of the oxygen-containing precursor.