# US 2021/0242013 A1 · Patterned structure

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- Number: US 2021/0242013 A1
- Document ID: US20210242013A1
- Status: Published application
- Kind: A1
- Application number: 17/234,818
- Filed: 2021-04-20
- Published: 2021-08-05
- Earliest claimed: 2018-03-23
- Assignees: United Microelectronics Corp.; Fujian Jinhua Integrated Circuit Co., Ltd.
- Applicants: United Microelectronics Corp.; Fujian Jinhua Integrated Circuit Co., Ltd.
- Inventors: Feng-Yi Chang; Fu-Che Lee
- Web page: https://patentgrep.com/patent/US20210242013A1

## CPC

- G03F 7/70466: {Multiple exposures, e.g. combination of fine and coarse exposures, double patterning or multiple exposures for printing a single feature (stitching G03F7/70475)}
- H10P 76/20: of masks comprising organic materials
- H10B 12/0335: {Making a connection between the transistor and the capacitor, e.g. plug}
- H10P 50/73: {using masks for insulating materials}
- H10P 76/4085: {characterised by the processes involved to create the masks}
- H10W 20/0633: {using subtractive patterning of the conductive members}
- H10W 20/089: {using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning}
- H10W 20/063: {by forming conductive members before forming protective insulating material}
- G03F: PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR; (phototypographic composing devices B41B; photosensitive materials or processes for photographic purposes G03C; electrophotography, sensitive layers or processes therefor G03G)
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10B: ELECTRONIC MEMORY DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A patterning method includes the following steps. A mask layer is formed on a material layer. A first hole is formed in the mask layer by a first photolithography process. A first mask pattern is formed in the first hole. A second hole is formed in the mask layer by a second photolithography process. A first spacer is formed on an inner wall of the second hole. A second mask pattern is formed in the second hole after the step of forming the first spacer. The first spacer surrounds the second mask pattern in the second hole. The mask layer and the first spacer are removed. The pattern of the first mask pattern and the second mask pattern are transferred to the material layer by an etching process.

## Claims

### Claim 1

A patterned structure, comprising:
a plurality of first sub patterns arranged in a first direction and a second direction, wherein the first sub patterns are arranged in the first direction by a first pitch;
a plurality of second sub patterns arranged in the first direction and the second direction, wherein the second sub patterns are arranged in the first direction by a second pitch; and
a plurality of third sub patterns arranged in the first direction and the second direction, wherein the third sub patterns are arranged in the first direction by a third pitch,
wherein the first pitch, the second pitch, and the third pitch are equal to one another, and one of the second sub patterns and one of the third sub patterns are disposed between two of the first sub patterns adjacent to each other in the first direction, wherein a first smallest distance exists between one of the first sub patterns and one of the second sub patterns in the first direction, a second smallest distance exists between one of the second sub patterns and one of the third sub patterns in the first direction, and a third smallest distance exists between one of the first sub patterns and one of the third sub patterns in the first direction, wherein at least two selected from the group consisting of the first smallest distance, the second smallest distance, and the third smallest distance are different from one another.

### Claim 2 (depends on 1)

The patterned structure according to claim 1, wherein the first sub patterns are arranged in the second direction by the first pitch, the second sub patterns are arranged in the second direction by the second pitch, and the third sub patterns are arranged in the second direction by the third pitch, wherein a fourth smallest distance exists between one of the first sub patterns and one of the second sub patterns in the second direction, a fifth smallest distance exists between one of the second sub patterns and one of the third sub patterns in the second direction, and a sixth smallest distance exists between one of the first sub patterns and one of the third sub patterns in the second direction, wherein at least two selected from the group consisting of the fourth smallest distance, the fifth smallest distance, and the sixth smallest distance are different from one another.

### Claim 3 (depends on 1)

The patterned structure according to claim 1, wherein the first direction is different from the second direction, and an included angle between the first direction and the second direction is smaller than 90 degrees.

### Claim 4 (depends on 1)

The patterned structure according to claim 1, wherein a shape of each of the first sub patterns, a shape of each of the second sub patterns, and a shape of each of the third sub patterns are identical to one another.

### Claim 5 (depends on 1)

The patterned structure according to claim 1, wherein the first sub patterns, the second sub patterns, and the third sub patterns are disposed on the same plane.

### Claim 6 (depends on 1)

The patterned structure according to claim 1, wherein the first sub patterns, the second sub patterns, and the third sub patterns include storage node pads of a semiconductor memory device.