# US 2021/0241833 A1 · Memory system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0241833 A1 - Document ID: US20210241833A1 - Status: Published application - Kind: A1 - Application number: 17/038,721 - Filed: 2020-09-30 - Published: 2021-08-05 - Earliest claimed: 2020-02-03 - Assignees: Kioxia Corporation - Applicants: Kioxia Corporation - Inventors: Kazutaka TAKIZAWA; Yoshihisa KOJIMA; Masaaki NIIJIMA - Web page: https://patentgrep.com/patent/US20210241833A1 ## CPC - G11C 16/14: Circuits for erasing electrically, e.g. erase voltage switching circuits - G11C 7/04: with means for avoiding disturbances due to temperature effects - G11C 16/0483: {comprising cells having several storage transistors connected in series} - G11C 16/16: for erasing blocks, e.g. arrays, words, groups - G11C 16/26: Sensing or reading circuits; Data output circuits - G11C 16/30: Power supply circuits - G11C 16/32: Timing circuits - G11C 16/3404: {Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells} - G11C 16/3418: {Disturbance prevention or evaluation; Refreshing of disturbed memory data} - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract A memory system includes a non-volatile memory chip and a controller. The non-volatile memory chip is capable of determining an erase voltage according to a temperature of the non-volatile memory chip and a correction parameter. The controller is configured to update the correction parameter of the non-volatile memory chip according to temperature information related to the temperature of the non-volatile memory chip. The non-volatile memory chip determines the erase voltage according to the temperature of the non-volatile memory chip and the updated correction parameter received from the controller. ## Claims ### Claim 1 A memory system comprising: a non-volatile memory chip capable of determining an erase voltage according to a temperature of the non-volatile memory chip and a correction parameter; and a controller configured to update the correction parameter of the non-volatile memory chip according to temperature information related to the temperature of the non-volatile memory chip, wherein the non-volatile memory chip is configured to determine the erase voltage according to the temperature of the non-volatile memory chip and the updated correction parameter received from the controller. ### Claim 2 (depends on 1) The memory system according to claim 1, wherein the non-volatile memory chip is capable of determining the erase voltage based on a first function defined by the correction parameter, the controller is further configured to: apply the temperature information to a second function to obtain a deviation amount of an appropriate erase voltage value obtained by the first function, and update the correction parameter according to the obtained deviation amount, and the non-volatile memory chip is further configured to apply the temperature of the non-volatile memory chip to the first function defined by the updated correction parameter received from the controller to determine the erase voltage. ### Claim 3 (depends on 2) The memory system according to claim 2, wherein the non-volatile memory chip is capable of measuring the temperature of the non-volatile memory chip, the controller is further configured to: obtain a difference between a temperature of the non-volatile memory chip at a first timing and a temperature of the non-volatile memory chip at a second timing, the first timing being a timing at which a data erase operation is performed on the non-volatile memory chip, the second timing being a timing subsequent to the first timing, apply the difference as the temperature information to the second function to obtain the deviation amount, and update the correction parameter according to the obtained deviation amount, and the non-volatile memory chip is further configured to: at the first and second timings, measure the temperature of the non-volatile memory chip, and at the second timing, apply the measured temperature to the first function defined by the updated correction parameter received from the controller to determine the erase voltage. ### Claim 4 (depends on 3) The memory system according to claim 3, wherein when the difference is greater than a threshold, the deviation amount obtained by applying the difference to the second function increases in proportion to the difference. ### Claim 5 (depends on 4) The memory system according to claim 4, wherein when the difference is less than the threshold, the deviation amount obtained by applying the difference to the second function is zero. ### Claim 6 (depends on 4) The memory system according to claim 4, wherein when the difference is less than the threshold, the deviation amount obtained by applying the difference to the second function decreases in proportion to the difference. ### Claim 7 (depends on 2) The memory system according to claim 2, further comprising: a board on which the non-volatile memory chip is mounted, wherein the non-volatile memory chip is capable of measuring the temperature of the non-volatile memory chip, the controller is further configured to: acquire information about a mounting position of the non-volatile memory chip, obtain a degree of heat influence from the controller to the non-volatile memory chip according to the information about the mounting position, apply the degree of heat influence as the temperature information to the second function to obtain the deviation amount, and update the correction parameter according to the obtained deviation amount, and the non-volatile memory chip is further configured to: measure the temperature of the non-volatile memory chip, and apply the measured temperature to the first function defined by the updated correction parameter received from the controller to determine the erase voltage. ### Claim 8 (depends on 1) The memory system according to claim 1, wherein the non-volatile memory chip includes a temperature sensor for measuring the temperature of the non-volatile memory chip. ### Claim 9 A memory system comprising: a plurality of non-volatile memory chips, each capable of determining an erase voltage according to a temperature thereof and a correction parameter; and a controller configured to update the correction parameter of each of the non-volatile memory chips according to temperature information thereof, wherein each of the non-volatile memory chips is configured to determine the erase voltage according to the temperature thereof and the updated correction parameter received from the controller. ### Claim 10 (depends on 9) The memory system according to claim 9, wherein each of the non-volatile memory chips is capable of determining the erase voltage based on a first function defined by the correction parameter, the controller is further configured to: for each of the non-volatile memory chips, apply the temperature information to a second function to obtain a deviation amount of an appropriate erase voltage value obtained by the first function, and update the correction parameter according to the obtained deviation amount, and each of the non-volatile memory chips is further configured to apply the temperature thereof to the first function defined by the updated correction parameter received from the controller to determine the erase voltage. ### Claim 11 (depends on 10) The memory system according to claim 10, wherein each of the non-volatile memory chips is capable of measuring the temperature thereof, the controller is further configured to: for each of the non-volatile memory chips, obtain a difference between a temperature of the non-volatile memory chip at a first timing and a temperature of the non-volatile memory chip at a second timing, the first timing being a timing at which a data erase operation is performed on the non-volatile memory chip, the second timing being a timing subsequent to the first timing, apply the difference as the temperature information to the second function to obtain the deviation amount, and update the correction parameter according to the obtained deviation amount, and each of the non-volatile memory chips is further configured to: at the first and second timings, measure the temperature of the non-volatile memory chip, and at the second timing, apply the measured temperature to the first function defined by the updated correction parameter received from the controller to determine the erase voltage. ### Claim 12 (depends on 11) The memory system according to claim 11, wherein for each of the non-volatile memory chips, when the difference is greater than a threshold, the deviation amount obtained by applying the difference to the second function increases in proportion to the difference. ### Claim 13 (depends on 12) The memory system according to claim 12, wherein for each of the non-volatile memory chips, when the difference is less than the threshold, the deviation amount obtained by applying the difference to the second function is zero. ### Claim 14 (depends on 12) The memory system according to claim 12, wherein for each of the non-volatile memory chips, when the difference is less than the threshold, the deviation amount obtained by applying the difference to the second function decreases in proportion to the difference. ### Claim 15 (depends on 10) The memory system according to claim 10, further comprising: a board on which the non-volatile memory chips are mounted, wherein each of the non-volatile memory chips is capable of measuring the temperature thereof, the controller is further configured to: for each of the non-volatile memory chips, acquire information about a mounting position of the non-volatile memory chip, obtain a degree of heat influence from the controller to the non-volatile memory chip according to the information about the mounting position, apply the degree of heat influence as the temperature information to the second function to obtain the deviation amount, and update the correction parameter according to the obtained deviation amount, and each of the non-volatile memory chips is further configured to: measure the temperature of the non-volatile memory chip, and apply the measured temperature to the first function defined by the updated correction parameter received from the controller to determine the erase voltage. ### Claim 16 (depends on 9) The memory system according to claim 9, wherein each of the non-volatile memory chips includes a temperature sensor for measuring the temperature thereof.