# US 2021/0241832 A1 · Memory devices with controlled wordline ramp rates, and associated systems and methods > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0241832 A1 - Document ID: US20210241832A1 - Status: Published application - Kind: A1 - Application number: 17/238,482 - Filed: 2021-04-23 - Published: 2021-08-05 - Earliest claimed: 2018-12-07 - Assignees: Micron Technology, Inc. - Applicants: Micron Technology, Inc. - Inventors: Allahyar Vahidimowlavi; Kalyan C. Kavalipurapu - Web page: https://patentgrep.com/patent/US20210241832A1 ## CPC - G11C 16/08: Address circuits; Decoders; Word-line control circuits - G11C 5/063: {Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay} - G11C 8/08: Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines - G11C 8/14: Word line organisation; Word line lay-out - G11C 16/0416: {comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM} - G11C 16/10: Programming or data input circuits - G11C 16/12: Programming voltage switching circuits - G11C 16/32: Timing circuits - G11C 16/3427: {Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written} - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract Memory devices with controlled wordline ramp rates and associated systems and methods are disclosed herein. In one embodiment, a memory device includes at least one voltage regulator and a plurality of wordlines. The memory device is configured, during a programming operation of the memory region, to ramp a selected wordline to a desired programming voltage while ramping one or more adjacent, unselected wordlines electrically coupled to the selected wordline to desired inhibit voltage(s) using the at least one voltage regulator. In some embodiments, the memory device ramps the selected wordline and the one or more adjacent, unselected wordlines such that the one or more adjacent, unselected wordlines reach the desired inhibit voltage(s) upon the selected wordline reaching the desired programming voltage. In these and other embodiments, the memory device ramps the selected wordline to the desired programming voltage without floating the selected wordline. ## Claims ### Claim 1 A semiconductor device configured to ramp an unselected wordline to a desired inhibit voltage such that the unselected wordline reaches the inhibit voltage upon a selected wordline reaching a desired programming voltage. ### Claim 2 (depends on 1) The semiconductor device of claim 1, wherein the semiconductor device is further configured to ramp the selected wordline to the desired programming voltage. ### Claim 3 (depends on 2) The semiconductor device of claim 2, wherein the semiconductor device is configured to ramp the selected wordline to the desired programming voltage without floating the selected wordline. ### Claim 4 (depends on 2) The semiconductor device of claim 2, wherein the semiconductor device is configured to continuously ramp the selected wordline to the desired programming voltage. ### Claim 5 (depends on 2) The semiconductor device of claim 2, wherein the semiconductor device is configured to ramp the selected wordline to the desired programming voltage in steps. ### Claim 6 (depends on 1) The semiconductor device of claim 1, wherein the semiconductor device is configured to continuously ramp the unselected wordline to the desired inhibit voltage. ### Claim 7 (depends on 1) The semiconductor device of claim 1, wherein the semiconductor device is configured to ramp the unselected wordline to the desired inhibit voltage in steps. ### Claim 8 (depends on 1) The semiconductor device of claim 1, wherein the unselected wordline is adjacent the selected wordline. ### Claim 9 (depends on 1) The semiconductor device of claim 1, comprising a voltage regulator electrically coupled to the selected wordline and to the unselected wordline. ### Claim 10 (depends on 9) The semiconductor device of claim 9, wherein the semiconductor device is configured to ramp the unselected wordline to the desired inhibit voltage using the voltage regulator. ### Claim 11 (depends on 1) The semiconductor device of claim 1, comprising a driver electrically coupled to the selected wordline and to the unselected wordline. ### Claim 12 (depends on 11) The semiconductor device of claim 11, wherein the semiconductor device is configured to ramp the unselected wordline to the desired inhibit voltage using the driver. ### Claim 13 (depends on 11) The semiconductor device of claim 11, wherein the semiconductor device is configured to ramp the selected wordline to the desired programming voltage using the driver. ### Claim 14 A semiconductor device, comprising: an inhibit voltage regulator, the inhibit voltage regulator including: an operational amplifier, a first transistor, and a second transistor electrically coupled to the first transistor and to an output of the operational amplifier; and a driver electrically coupled to a gate of the first transistor. ### Claim 15 (depends on 14) The semiconductor device of claim 14, wherein a gate of the second transistor is electrically coupled to the output of the operational amplifier. ### Claim 16 (depends on 14) The semiconductor device of claim 14, wherein the driver is a voltage divider. ### Claim 17 (depends on 14) The semiconductor device of claim 14, where the first and second transistors are electrically coupled to an input of the operational amplifier. ### Claim 18 (depends on 17) The semiconductor device of claim 17, wherein the first and second transistors are electrically coupled to the input of the operational amplifier via a resistor. ### Claim 19 (depends on 14) The semiconductor device of claim 14, wherein: the semiconductor device further comprises a first wordline and a second wordline; the driver is electrically coupled to the first wordline; and the driver is coupled to the second wordline via the first transistor. ### Claim 20 (depends on 14) The semiconductor device of claim 14, wherein: the semiconductor device further comprises a first wordline and a second wordline adjacent the first wordline; and the inhibit voltage regulator is electrically coupled to the second wordline via the first transistor.