# US 2021/0241806 A1 · Streaming access memory device, system and method

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- Number: US 2021/0241806 A1
- Document ID: US20210241806A1
- Status: Published application
- Kind: A1
- Application number: 17/158,875
- Filed: 2021-01-26
- Published: 2021-08-05
- Earliest claimed: 2020-01-30
- Assignees: STMicroelectronics International N.V.; STMicroelectronics S.r.l.
- Applicants: STMicroelectronics International N.V.; STMICROELECTRONICS S.r.l.
- Inventors: Nitin CHAWLA; Thomas BOESCH; Anuj Grover; Surinder Pal SINGH; Giuseppe DESOLI
- Web page: https://patentgrep.com/patent/US20210241806A1

## CPC

- G06F 12/0207: {with multidimensional access, e.g. row/column, matrix}
- G11C 8/04: using a sequential addressing device, e.g. shift register, counter
- G06N 3/02: Neural networks
- G06N 3/045: Combinations of networks
- G06N 3/0464: Convolutional networks [CNN, ConvNet]
- G06N 3/063: using electronic means
- G11C 7/1006: {Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor}
- G11C 8/08: Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
- G11C 8/10: Decoders
- G11C 11/54: using elements simulating biological cells, e.g. neuron
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11C: STATIC STORES (semiconductor memory devices H10B)
- G06N: COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS

## Abstract

A system includes a random access memory organized into individually addressable words. Streaming access control circuitry is coupled to word lines of the random access memory. The streaming access control circuitry responds to a request to access a plurality of individually addressable words of a determined region of the random access memory by generating control signals to drive the word lines to streamingly access the plurality of individually addressable words of the determined region. The request indicates an offset associated with the determined region and a pattern associated with the streaming access.

## Claims

### Claim 1

A device, comprising:
one or more inputs configured to receive a streaming access request to access a plurality of individually addressable words of a determined region of a random access memory, the request indicating an offset associated with the determined region and a pattern associated with the streaming access;
a plurality of outputs configured to couple to word lines of the random access memory; and
streaming access control circuitry coupled to the one or more inputs and to the plurality of outputs and configured to respond to the streaming access request by generating control signals to drive the word lines to access the plurality of individually addressable words of the determined region.

### Claim 2 (depends on 1)

The device of claim 1 wherein the request includes the offset associated with the determined region.

### Claim 3 (depends on 2)

The device of claim 2 wherein the request includes an indication of the pattern associated with the streaming access.

### Claim 4 (depends on 3)

The device of claim 3 wherein the streaming access control circuitry identifies the determined region based on the offset and the indication of the pattern associated with the streaming access.

### Claim 5 (depends on 3)

The device of claim 3 wherein the streaming access control circuitry includes a memory configured to store streaming access control information and the indication is a command to perform a streaming access based on stored streaming access control information.

### Claim 6 (depends on 1)

The device of claim 1 wherein the request indicates a plurality of offsets defining the determined region.

### Claim 7 (depends on 1)

The device of claim 1 wherein the streaming access control circuitry comprises:
stream control circuitry configured to generate the control signals to drive the word lines, the stream control circuitry including a plurality of shift registers and a bank of multiplexers coupled to the plurality of shift registers; and
configuration control circuitry configured to generate register data and control signals to control loading of the register data into the plurality of shift registers and shifting of the plurality of shift registers.

### Claim 8 (depends on 7)

The device of claim 7 wherein a first data input of each multiplexer of the bank of multiplexers is coupled to a respective output of one of the plurality of shift registers and a select input of each multiplexer of the bank of multiplexers is coupled to a respective output of another of the plurality of shift registers.

### Claim 9 (depends on 8)

The device of claim 8 wherein a second data input of each multiplexer of the bank of multiplexers is coupled to an output of an adjacent multiplexer in the bank of multiplexers and the plurality of outputs are coupled to respective outputs of multiplexers of the bank of multiplexers.

### Claim 10 (depends on 1)

The device of claim 1 wherein the random access memory is addressable in a three-dimensional address space.

### Claim 11 (depends on 1)

The device of claim 1 wherein the streaming access control circuitry is configured generate control signals to perform one or more in-memory compute operations associated with the streaming access request.

### Claim 12

A system, comprising:
a random access memory organized into individually addressable words; and
streaming access control circuitry coupled to word lines of the random access memory, wherein the streaming access control circuitry, in operation, responds to a request to streamingly access a plurality of individually addressable words of a determined region of the random access memory by generating control signals to drive the word lines to access the plurality of individually addressable words of the determined region, wherein the request indicates an offset associated with the determined region and a pattern associated with the streaming access.

### Claim 13 (depends on 12)

The system of claim 12 wherein the request includes the offset associated with the determined region.

### Claim 14 (depends on 13)

The system of claim 13 wherein the request includes an indication of a sequence of the streaming access.

### Claim 15 (depends on 14)

The system of claim 14 wherein the streaming access control circuitry identifies the determined region based on the offset and the indication of the sequence of the streaming access.

### Claim 16 (depends on 12)

The system of claim 12 wherein the request indicates a plurality of offsets associated with the determined region.

### Claim 17 (depends on 12)

The system of claim 12 wherein the request indicates a plurality of offsets defining the determined region.

### Claim 18 (depends on 12)

The system of claim 12 wherein the streaming access control circuitry comprises:
stream control circuitry configured to generate the control signals to drive the word lines, the stream control circuitry including a plurality of shift registers and a bank of multiplexers coupled to the plurality of shift registers; and
configuration control circuitry configured to generate register data and control signals to control loading of the register data into the plurality of shift registers and shifting of the plurality of shift registers.

### Claim 19 (depends on 12)

The system of claim 12 wherein the random access memory is addressable in a three-dimensional address space.

### Claim 20 (depends on 12)

The system of claim 12, comprising random access control circuitry coupled to the word lines of the random access memory, wherein the random access control circuitry, in operation, responds to a request to access an individually addressable word of the random access memory.

### Claim 21 (depends on 12)

The system of claim 12, comprising one or more convolutional accelerators coupled to the streaming access control circuitry and to the random access memory, wherein, in operation, the one or more convolutional accelerators provide requests to streamingly access a plurality of individually addressable words of a determined region of the random access memory to the streaming access control circuitry and receive responses to the requests from the random access memory.

### Claim 22 (depends on 12)

The system of claim 12 wherein the random access memory comprises storage elements and one or more in-memory compute elements, and the streaming access control circuitry, in operation, responds to a streaming access request associated with an in-memory compute operation by generating control signals to perform the in-memory compute operation using in-memory compute elements of the random access memory.

### Claim 23

A method, comprising:
receiving, by streaming access control circuitry of a random access memory, a streaming access request to access a plurality of individually addressable words of a determined region of the random access memory, the request indicating an offset associated with the determined region and a pattern associated with the streaming access; and
responding, by the streaming access control circuitry, to the request by generating control signals to drive word lines of the random access memory to access the plurality of individually addressable words of the determined region.

### Claim 24 (depends on 23)

The method of claim 23 wherein the request includes the offset associated with the determined region.

### Claim 25 (depends on 24)

The method of claim 24 wherein the request includes an indication of the pattern of the streaming access.

### Claim 26 (depends on 25)

The method of claim 25, comprising, identifying, by the streaming access control circuitry, the determined region based on the offset and the indication of the pattern of the streaming access.

### Claim 27 (depends on 25)

The method of claim 25 comprising storing, in a memory of the streaming access control circuitry, streaming access control information, wherein the indication is a command to perform a streaming access based on stored streaming access control information.

### Claim 28 (depends on 23)

The method of claim 23 wherein the request indicates a plurality of offsets defining the determined region.

### Claim 29 (depends on 23)

The method of claim 23 wherein the random access memory is addressable in a three-dimensional address space.

### Claim 30 (depends on 23)

The method of claim 23 wherein the streaming access request is associated with an in-memory compute operation and the method comprises performing the in-memory compute operation as part of the response to the streaming access request.

### Claim 31

A non-transitory computer-readable medium having contents which configure a streaming access controller of a random access memory to perform a method, the method comprising:
receiving a streaming access request to access a plurality of individually addressable words of a determined region of the random access memory, the request indicating an offset associated with the determined region and a pattern associated with the streaming access; and
responding to the request by generating control signals to drive word lines of the random access memory to access the plurality of individually addressable words of the determined region.

### Claim 32 (depends on 31)

The non-transitory computer-readable medium of claim 31 wherein the request includes the offset associated with the determined region and an indication of the pattern of the streaming access.

### Claim 33 (depends on 31)

The non-transitory computer-readable medium of claim 31 wherein the random access memory is addressable in a three-dimensional address space and the determined region is a three-dimensional region in the three-dimensional address space.

### Claim 34 (depends on 31)

The non-transitory computer-readable medium of claim 31 wherein the contents comprise a look-up table storing registry and timing information used by the streaming access controller to generate the control signals to drive the word lines.
