# US 2021/0241700 A1 · Source Driver Integrated Circuit, Display Device, And Method Of Operating Display Device

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- Number: US 2021/0241700 A1
- Document ID: US20210241700A1
- Status: Published application
- Kind: A1
- Application number: 17/155,561
- Filed: 2021-01-22
- Published: 2021-08-05
- Earliest claimed: 2020-01-31
- Assignees: Silicon Works Co., Ltd.
- Applicants: Silicon Works Co., Ltd.
- Inventors: You Jin KWON; Sang Kwon KIM; Chang Sung HONG; Pyeong Keun OH; Jun Ho KWAK
- Web page: https://patentgrep.com/patent/US20210241700A1

## CPC

- G09G 3/3275: Details of drivers for data electrodes
- G09G 2300/0408: Integration of the drivers onto the display substrate
- G09G 2310/08: Details of timing specific for flat panels, other than clock recovery
- G09G 2320/0223: Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
- G09G 2320/0295: by monitoring each display pixel
- G09G 2320/045: Compensation of drifts in the characteristics of light emitting or modulating elements
- G09G 2370/08: Details of image data interface between the display device controller and the data line driver circuit
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

Provided are a source driver integrated circuit (IC) according to the present disclosure including a first buffer in which first sensing data transmitted from a first source driver IC is stored, a sensing data generation circuit configured to sense a characteristic of a driving element included in each pixel and generate second sensing data, a second buffer in which the second sensing data is stored, a control circuit configured to generate a selection signal in response to an operation command, and a selector configured to transmit one of the first sensing data stored in the first buffer and the second sensing data stored in the second buffer to a second source driver IC in response to the selection signal.

## Claims

### Claim 1

A source driver IC comprising:
a first buffer in which first sensing data transmitted from a first source driver IC is stored;
a sensing data generation circuit configured to sense a characteristic of a driving element included in each pixel and generate second sensing data;
a second buffer in which the second sensing data is stored;
a control circuit configured to generate a selection signal in response to an operation command; and
a selector configured to transmit one of the first sensing data stored in the first buffer and the second sensing data stored in the second buffer to a second source driver IC in response to the selection signal.

### Claim 2 (depends on 1)

The source driver IC of claim 1, further comprising:
a first pin configured to receive the first sensing data;
a second pin configured to receive a first clock signal related to transmission of the first sensing data;
a third pin connected to an output terminal of the selector to transmit one of the first sensing data and the second sensing data to the second source driver IC; and
a fourth pin configured to transmit a second clock signal related to transmission of the second sensing data to the second source driver IC.

### Claim 3 (depends on 2)

The source driver IC of claim 2, further comprising a clock embedded data signaling (CEDS) control packet receiving pin configured to receive a CEDS control packet which includes the operation command and is output from the timing controller.

### Claim 4 (depends on 2)

The source driver IC of claim 2, wherein the second clock signal is determined according to a clock signal included in a CEDS control packet conforming to a CEDS protocol.

### Claim 5 (depends on 2)

The source driver IC of claim 2, further comprising:
a data packet receiving pin configured to receive a data packet (CDATA) that includes the operation command and is output from a timing controller; and
a reference clock receiving pin configured to receive a reference clock signal (ACLK) that is output from the timing controller and related to transmission of the data packet (CDATA).

### Claim 6 (depends on 5)

The source driver IC of claim 5, wherein the control circuit generates the second clock signal according to the reference clock signal (ACLK).

### Claim 7

A display device comprising a data driving circuit block including a plurality of source driver IC each configured to sense a characteristic of a driving element included in each pixel and obtain sensing data,
wherein each of the plurality of source driver ICs includes a first source driver IC connected to a first pixel and configured to transmit first sensing data, which is obtained by sensing a characteristic of a driving element included in the first pixel, to a timing controller when a first transmission command is received from the timing controller, and
a second source driver IC connected to a second pixel and configured to transmit second sensing data, which is obtained by sensing a characteristic of a driving element included in the second pixel, to the first source driver IC when the first transmission command is received.

### Claim 8 (depends on 7)

The display device of claim 7, wherein
the first source driver IC transmits the second sensing data received from the second source driver IC to the timing controller when a second transmission command is received from the timing controller, and
the second source driver IC transmits third sensing data received from a third source driver IC or dummy data to the first source driver IC when the second transmission command is received.

### Claim 9 (depends on 7)

The display device of claim 7, wherein the plurality of source driver ICs are connected in a cascade manner for transmission of the sensing data.

### Claim 10 (depends on 7)

The display device of claim 7, wherein the data driving circuit block further includes a board connected to the first and second source driver ICs,
wherein the board includes a first wire for transmitting the second sensing data transmitted from the second source driver IC to the first source driver IC and a second wire for transmitting a clock signal, which is output from the second source driver IC and related to transmission of the second sensing data, to the first source driver IC.

### Claim 11 (depends on 8)

The display device of claim 8, further comprising the timing controller configured to generate a control command including one of a sensing command for causing the plurality of source driver ICs to obtain the sensing data, the first transmission command, and the second transmission command and transmit the control command to the plurality of source driver ICs.

### Claim 12 (depends on 11)

The display device of claim 11, wherein
the timing controller generates the control command in the form of a control packet conforming to a clock embedded data signaling (CEDS) protocol, and
the plurality of source driver ICs output an output clock signal, which is determined on the basis of a clock signal included in the control packet, together with the sensing data.

### Claim 13 (depends on 11)

The display device of claim 11, wherein the timing controller generates the control command in the form of a data packet (CDATA) and transmits a reference clock signal (ACLK) related to transmission of the data packet (CDATA) to the plurality of source driver ICs in a point-to-point manner.

### Claim 14 (depends on 13)

The display device of claim 13, wherein the plurality of source driver ICs generate an output clock signal related to transmission of the sensing data according to the reference clock signal (ACLK) and output the sensing data using the output clock signal.

### Claim 15 (depends on 11)

The display device of claim 11, wherein
the timing controller is connected to the plurality of source driver ICs in a point-to-point manner to transmit the control command thereto, and
the first source driver IC is connected to the timing controller in a point-to-point manner to transmit the first sensing data thereto.

### Claim 16

A method of operating a display device comprising a timing controller, a first source driver IC connected to a first pixel group, and a second source driver IC connected to a second pixel group, the method comprising:
generating first sensing data by sensing pixels included in the first pixel group by the first source driver IC and generating second sensing data by sensing pixels included in the second pixel group by the second source driver IC in response to a sensing command output from the timing controller;
transmitting the first sensing data to the timing controller by the first source driver IC and transmitting the second sensing data to the first source driver IC by the second source driver IC in response to a first transmission command output from the timing controller; and
transmitting the second sensing data, which is transmitted from the second source driver IC, to the timing controller by the first source driver IC in response to a second transmission command output from the timing controller.

### Claim 17 (depends on 16)

The method of claim 16, further comprising:
generating a first clock signal related to transmission of the first sensing data according to a reference clock signal output from the timing controller and transmitting the first clock signal and the first sensing data to the timing controller by the first source driver IC; and
generating a second clock signal related to transmission of the second sensing data according to the reference clock signal and transmitting the second clock signal and the second sensing data to the first source driver IC by the second source driver IC.
