# US 2021/0241083 A1 · Arithmetic device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0241083 A1 - Document ID: US20210241083A1 - Status: Published application - Kind: A1 - Application number: 17/049,065 - Filed: 2019-01-28 - Published: 2021-08-05 - Earliest claimed: 2018-05-15 - Assignees: Mitsubishi Electric Corporation - Applicants: Mitsubishi Electric Corporation - Inventors: Kyohei SUWABE; Kenya SUGIHARA; Seidai TAKEDA - Web page: https://patentgrep.com/patent/US20210241083A1 ## CPC - G06N 3/063: using electronic means - G06F 7/50: Adding; Subtracting (G06F7/483 - G06F7/491, G06F7/544 - G06F7/556 take precedence) - G06F 7/523: Multiplying only - G06F 7/5443: {Sum of products (for applications thereof, see the relevant places, e.g. G06F17/10, H03H17/00)} - G06F 17/10: Complex mathematical operations {(function generation by table look-up G06F1/03; evaluation of elementary functions by calculation G06F7/544)} - G06N 3/045: Combinations of networks - G06N 3/0464: Convolutional networks [CNN, ConvNet] - G06N 3/048: Activation functions - G06N 3/0495: Quantised networks; Sparse networks; Compressed networks - G06N: COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract An arithmetic device includes a first register that stores input data as values of a plurality of input neurons, a plurality of ports, and a plurality of processing element groups that correspond to the plurality of ports, respectively, and can access the first register through the respective corresponding ports. Each processing element group includes a plurality of processing elements. Each processing element is associated with at least one of a plurality of output neurons and performs a multiply-and-accumulate computation in which a value of at least one input neuron connected to a corresponding output neuron is multiplied by a weight coefficient and results of multiplication are accumulated. ## Claims ### Claim 1 An arithmetic device for a computation in a convolutional layer of a convolutional neural network, the convolutional layer including a plurality of input neurons and a plurality of output neurons each connected to at least one of the plurality of input neurons, the arithmetic device comprising: a first register that stores input data as a value of at least one of the plurality of input neurons; a plurality of ports; and a plurality of processing element groups that correspond to the plurality of ports, respectively, and can access the first register through respective corresponding ports, wherein each of the processing element groups includes a plurality of processing elements, and each of the processing elements is associated with at least one of the plurality of output neurons and performs a multiply-and-accumulate computation in which a value of at least one input neuron connected to a corresponding output neuron is multiplied by a weight coefficient and a result of multiplication is accumulated. ### Claim 2 (depends on 1) The arithmetic device according to claim 1, wherein each of the plurality of processing element groups includes a first memory that stores index numbers of a plurality of input neurons necessary for performing the multiply-and-accumulate computation in the plurality of processing elements included in that processing element group. ### Claim 3 (depends on 2) The arithmetic device according to claim 2, wherein each of the plurality of processing element groups reads values of the input neurons with the index numbers stored in the first memory from the first register through a corresponding port and scatters the read values of the input neurons to the plurality of processing elements included in that processing element group. ### Claim 4 (depends on 2) The arithmetic device according to claim 2, wherein each of the plurality of processing elements included in each processing element group includes a second memory that stores a weight coefficient associated with each of the index numbers stored in a corresponding first memory. ### Claim 5 (depends on 1) The arithmetic device according to claim 1, further comprising: a plurality of activators that individually correspond to the processing elements, each of the plurality of activators applying an activation function to a result of the multiply-and-accumulate computation in a corresponding processing element; and a second register that stores outputs from the plurality of activators. ### Claim 6 (depends on 5) The arithmetic device according to claim 5, wherein the arithmetic device associates the plurality of output neurons with the processing elements in the plurality of processing element groups in a second order different from a first order, the first order being an order of index numbers of the plurality of output neurons, the arithmetic device further comprises a switch that rearranges outputs from the plurality of activators into the first order that is an original order of the index numbers of the plurality of output neurons, and the second register stores results output from the plurality of activators in the first order resulting from rearrangement by the switch. ### Claim 7 (depends on 6) The arithmetic device according to claim 6, wherein the number of times of reading from the first register, of input data necessary for performing the multiply-and-accumulate computation in each processing element in the plurality of processing element groups is smaller when the plurality of output neurons are associated with the processing elements in the plurality of processing element groups in the second order than when the plurality of output neurons are associated with the processing elements in the plurality of processing element groups in the first order. ### Claim 8 (depends on 6) The arithmetic device according to claim 6, wherein a computation in the convolutional layer includes performing a convolution computation onto input neurons among the plurality of input neurons that are within a range corresponding to a convolution kernel, while the range is sequentially varied, the first register simultaneously stores as input data, a plurality of first input neurons and a plurality of second input neurons different from each other in the range, the second register simultaneously stores as output data, values of a plurality of first output neurons generated by the convolution computation onto the plurality of first input neurons and values of a plurality of second output neurons generated by the convolution computation onto the plurality of second input neurons, and the arithmetic device associates, in the second order, one of the plurality of first output neurons and one of the plurality of second output neurons with processing elements different from each other that belong to an identical processing element group. ### Claim 9 (depends on 1) The arithmetic device according to claim 1, wherein in the convolutional neural network, a plurality of layers each including the convolutional layer are connected in series , with a first-in first-out queue being interposed, the arithmetic device further comprises a line buffer connected between an input-side queue and the first register, and with the line buffer being interposed, the first register stores data necessary for a computation in the plurality of processing element groups in an order different from an order of input data provided from the input-side queue.