# US 2021/0240871 A1 · Verification method and system

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- Number: US 2021/0240871 A1
- Document ID: US20210240871A1
- Status: Published application
- Kind: A1
- Application number: 17/158,819
- Filed: 2021-01-26
- Published: 2021-08-05
- Earliest claimed: 2020-02-05
- Assignees: Realtek Semiconductor Corp.
- Applicants: Realtek Semiconductor Corporation
- Inventors: SHIUE-RU WU; CHING-TUNG WU
- Web page: https://patentgrep.com/patent/US20210240871A1

## CPC

- G06F 21/575: {Secure boot}
- G06F 21/79: in semiconductor storage media, e.g. directly-addressable memories
- G06F 3/062: {Securing storage systems}
- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/068: {Hybrid storage device}
- G06F 9/4401: Bootstrapping (security arrangements therefor G06F21/57)
- H04L 9/0643: {Hash functions, e.g. MD5, SHA, HMAC or f9 MAC}
- H04L 9/0825: {using asymmetric-key encryption or public key infrastructure [PKI], e.g. key signature or public key certificates}
- H04L 9/30: Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
- H04L 9/3236: {using cryptographic hash functions}
- H04L 9/3247: {involving digital signatures}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

The application discloses a verification method and system. The verification method is for verifying content of a first volatile read-write memory of a chip. A first non-volatile read-write memory of the chip stores a firmware image, including predetermined calculation value. The chip includes a second volatile read-write memory. The verification method includes: at a bootloader mode, loading a first portion and a second portion of the firmware image to the first volatile read-write memory and the second volatile read-write memory respectively; performing a first specific operation to the first portion and the second portion to obtain a first calculation value; performing a second specific operation to the first calculation value to obtain a second calculation value and storing the second calculation value in the second volatile read-write memory.

## Claims

### Claim 1

A verification method for verifying a content of a first volatile read-write memory of a chip, wherein a first non-volatile read-write memory of the chip stores a firmware image, the firmware image includes a predetermined calculation value, the chip includes a second volatile read-write memory, and the verification method comprises:
verifying the firmware image of the first non-volatile read-write memory at a bootloader mode;
loading a first portion of the firmware image into the first volatile read-write memory, and loading a second portion of the firmware image into the second volatile read-write memory;
performing a first specific operation according to the first portion loaded into the first volatile read-write memory and the second portion loaded into the second volatile read-write memory to obtain a first calculation value;
when the first calculation value matches with the predetermined calculation value, performing a second specific operation according to the first calculation value to obtain a second calculation value; and
storing the second calculation value in the second volatile read-write memory and entering an active mode.

### Claim 2 (depends on 1)

The verification method of claim 1, further comprising:
after controlling the chip to enter a power saving mode from the active mode, controlling the chip to enter an event trigger mode according to a trigger event, and performing the first specific operation according to the first portion loaded into the first volatile read-write memory and the second portion loaded into the second volatile read-write memory to obtain a third calculation value;
performing the second specific operation according to the third calculation value to obtain a fourth calculation value; and
when the fourth calculation value matches with the second calculation value stored in the second volatile read-write memory, controlling the chip to enter the active mode.

### Claim 3 (depends on 2)

The verification method of claim 2, wherein the chip further includes a second non-volatile read-write memory, and the second non-volatile read-write memory stores a key, and the step of performing the second specific operation according to the first calculation value to obtain the second calculation value comprises:
performing the second specific operation according to the first calculation value and the key to obtain the second calculation value; and
the step of performing the second specific operation according to the third calculation value to obtain the fourth calculation value comprises:
performing the second specific operation according to the third calculation value and the key to obtain the fourth calculation value.

### Claim 4 (depends on 1)

The verification method of claim 1, wherein the step of storing the second calculation value in the second volatile read-write memory comprises:
storing the second calculation value, together with a size and a loading address of each of the first portion and the second portion, in the second volatile read-write memory.

### Claim 5 (depends on 2)

The verification method of claim 2, further comprising:
when the fourth calculation value mismatches with the second calculation value, controlling the chip to enter the bootloader mode.

### Claim 6 (depends on 2)

The verification method of claim 2, wherein the step of performing the second specific operation according to the third calculation value to obtain the fourth calculation value comprises:
when the third calculation value matches with the first calculation value, performing the second specific operation according to the third calculation value to obtain the fourth calculation value.

### Claim 7 (depends on 2)

The verification method of claim 2, further comprising:
when the third calculation value mismatches with the first calculation value, controlling the chip to enter the bootloader mode.

### Claim 8 (depends on 3)

The verification method of claim 3, wherein the firmware image further includes a digital signature, and the first non-volatile read-write memory further stores a public key, and the step of verifying the firmware image of the first non-volatile read-write memory comprises:
verifying the public key;
performing the first specific operation according to the firmware image to obtain a fifth calculation value;
when the fifth calculation value matches with the predetermined calculation value, performing a third specific operation according to the fifth calculation value and the public key to obtain a sixth calculation value; and
comparing the sixth calculation value with the digital signature.

### Claim 9 (depends on 8)

The verification method of claim 8, wherein the second non-volatile read-write memory further stores a public key predetermined calculation value, and the step of verifying the public key comprises:
performing the first specific operation according to the public key to obtain a seventh calculation value; and
comparing the seventh calculation value with the public key predetermined calculation value.

### Claim 10 (depends on 1)

The verification method of claim 1, wherein the first specific operation is a hashing algorithm without a password, and the second specific operation is a hashing algorithm with a password.

### Claim 11 (depends on 8)

The verification method of claim 8, wherein the third specific operation is an asymmetrical cryptography operation.

### Claim 12

A verification method for verifying a content of a first volatile read-write memory of a chip, wherein a first non-volatile read-write memory of the chip stores a firmware image, the firmware image includes a predetermined calculation value, the chip includes a second volatile read-write memory, and the verification method comprises:
verifying the firmware image of the first non-volatile read-write memory at a bootloader mode;
loading a first portion of the firmware image into the first volatile read-write memory, and loading a second portion of the firmware image into the second volatile read-write memory;
performing a first specific operation according to the first portion loaded into the first volatile read-write memory and the second portion loaded into the second volatile read-write memory to obtain a first calculation value;
when the first calculation value matches with the predetermined calculation value, storing the first calculation value in the second volatile read-write memory and entering an active mode.

### Claim 13 (depends on 12)

The verification method of claim 12, further comprising:
after controlling the chip to enter a power saving mode from the active mode, controlling the chip to enter an event trigger mode according to a trigger event, and performing the first specific operation according to the first portion loaded into the first volatile read-write memory and the second portion loaded into the second volatile read-write memory to obtain a third calculation value;
when the third calculation value matches with the first calculation value stored in the second volatile read-write memory, controlling the chip to enter the active mode.

### Claim 14 (depends on 12)

The verification method of claim 12, wherein the step of storing the first calculation value in the second volatile read-write memory comprises:
storing the first calculation value, together with a size and a loading address of each of the first portion and the second portion, in the second volatile read-write memory.

### Claim 15 (depends on 13)

The verification method of claim 13, further comprising:
when the third calculation value mismatches with the first calculation value stored in the second volatile read-write memory, controlling the chip to enter the bootloader mode.

### Claim 16 (depends on 12)

The verification method of claim 12, wherein the firmware image further includes a digital signature, and the chip further includes a second non-volatile read-write memory, the first non-volatile read-write memory further stores a public key, and the step of verifying the firmware image of the first non-volatile read-write memory comprises:
verifying the public key;
performing the first specific operation according to the firmware image to obtain a fourth calculation value;
when the fourth calculation value matches with the predetermined calculation value, performing a third specific operation according to the fourth calculation value and the public key to obtain a fifth calculation value; and
comparing the fifth calculation value with the digital signature.

### Claim 17 (depends on 16)

The verification method of claim 16, wherein the second non-volatile read-write memory further stores a public key predetermined calculation value, and the step of verifying the public key comprises:
performing the first specific operation according to the public key to obtain a sixth calculation value; and
comparing the sixth calculation value with the public key predetermined calculation value.

### Claim 18 (depends on 12)

The verification method of claim 12, wherein the first specific operation is a hashing algorithm without a password.

### Claim 19 (depends on 16)

The verification method of claim 16, wherein the third specific operation is an asymmetrical cryptography operation,

### Claim 20

A system, comprises:
a first volatile read-write memory; and
a first non-volatile read-write memory, configured to store a firmware image, wherein the firmware image includes a predetermined calculation value;
a chip, coupled to the first volatile read-write memory and the first non-volatile read-write memory, the chip including:
a second volatile read-write memory;
a verification program memory, configured to store a verification program;
a processor, configured to perform a verification method for verifying a content of the first volatile read-write memory according to the verification program, the verification method including:
verifying the firmware image of the first non-volatile read-write memory at a bootloader mode;
loading a first portion of the firmware image into the first volatile read-write memory and loading a second portion of the firmware image into the second volatile read-write memory;
performing a first specific operation according to the first portion loaded into the first volatile read-write memory and the second portion loaded into the second volatile read-write memory to obtain a first calculation value;
when the first calculation value matches with the predetermined calculation value, performing a second specific operation according to the first calculation value to obtain a second calculation value; and
storing the second calculation value in the second volatile read-write memory and entering an active mode.