# US 2021/0240213 A1 · Precision reference circuit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0240213 A1 - Document ID: US20210240213A1 - Status: Published application - Kind: A1 - Application number: 16/781,549 - Filed: 2020-02-04 - Published: 2021-08-05 - Earliest claimed: 2020-02-04 - Assignees: Texas Instruments Incorporated - Applicants: Texas Instruments Incorporated - Inventors: Sreejish Sreenivasan; Mehedi Hassan; Tianhong Yang - Web page: https://patentgrep.com/patent/US20210240213A1 ## CPC - G05F 3/30: Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities (G05F3/26 takes precedence) - G05F 3/26: Current mirrors - H03M 1/1019: {by storing a corrected or correction value in a digital look-up table} - G05F 1/46: wherein the variable actually regulated by the final control device is DC (G05F1/625 takes precedence) - G05F 3/267: {using both bipolar and field-effect technology} - G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) ## Abstract An electronic device includes a precision reference circuit, which contains a bandgap reference circuit and an offset-correction circuit. The bandgap reference circuit has an output that is coupled to provide a bandgap reference voltage and an intermediate node that is separated from the output by a transimpedance resistor. The offset-correction circuit is coupled to the bandgap reference circuit and includes a DAC. The DAC is coupled to the intermediate node and is also coupled to receive an external digital value. The external digital value determines a fraction of a correction current that will be passed by the DAC. ## Claims ### Claim 1 An electronic device having a precision reference circuit, the precision reference circuit comprising: a bandgap reference circuit having an output that is coupled to provide a bandgap reference voltage and having an intermediate node that is separated from the output by a transimpedance resistor; and an offset-correction circuit that is coupled to the bandgap reference circuit and that includes a digital-to-analog converter (DAC), the DAC being coupled to the intermediate node and being further coupled to receive an external digital value, the external digital value determining a fraction of a correction current to be passed by the DAC. ### Claim 2 (depends on 1) The electronic device as recited in claim 1 wherein the offset-correction circuit further includes: a first resistor coupled in series with a first N-type field effect transistor (NFET), a second NFET and a second resistor between the output of the bandgap reference circuit and a lower supply voltage; a third resistor coupled in series with a fourth resistor between the output of the bandgap reference circuit and the lower supply voltage; and a first operational amplifier having an inverting input coupled to a first node between the third resistor and the fourth resistor, a non-inverting input coupled to a second node between the first resistor and the first NFET and an output coupled to a gate of the second NFET and to the DAC. ### Claim 3 (depends on 2) The electronic device as recited in claim 2 wherein the DAC includes DAC elements, each DAC element having a first bias NFET coupled in series with a second bias NFET and a DAC resistor between the intermediate node and the lower supply voltage, a gate of the first bias NFET being coupled through a first switch to a first bias voltage and a gate of the second bias NFET being coupled through a second switch to a second bias voltage provided by the first operational amplifier. ### Claim 4 (depends on 3) The electronic device as recited in claim 3 wherein the first switch and the second switch of a respective DAC element are controlled by a respective bit of the external digital value. ### Claim 5 (depends on 4) The electronic device as recited in claim 4 wherein for an nth DAC element, the first bias NFET, the second bias NFET, and the DAC resistor are sized to pass a respective current that is equal to the correction current divided by two to the nth power. ### Claim 6 (depends on 3) The electronic device as recited in claim 3 wherein the bandgap reference circuit includes: a second operational amplifier; a first P-type field effect transistor (PFET) coupled in series with the transimpedance resistor between an upper voltage supply and the intermediate node, a gate of the first PFET being coupled to an output of the second operational amplifier; a fifth resistor coupled in series with a first bipolar transistor between the intermediate node and the lower supply voltage; a sixth resistor and a seventh resistor coupled in series with a second bipolar transistor between the intermediate node and the lower supply voltage; and a current source coupled in series with a third bipolar transistor between the upper supply voltage and the lower supply voltage, an inverting input of the second operational amplifier being coupled through a first feedback resistor to a third node between the current source and the third bipolar transistor and being further coupled to a fourth node between the fifth resistor and the first bipolar transistor, a non-inverting input of the second operational amplifier being coupled through a second feedback resistor to the third node and being further coupled to a fifth node between the sixth resistor and the seventh resistor. ### Claim 7 (depends on 1) The electronic device as recited in claim 1 wherein the offset-correction circuit includes: a first resistor coupled in series with a first N-type field effect transistor (NFET), a second NFET and a second resistor between the upper supply voltage and the intermediate node; a third resistor coupled in series with a fourth resistor between the upper supply voltage and the intermediate node; a first operational amplifier having an inverting input coupled to a first node between the third resistor and the fourth resistor, a non-inverting input coupled to a second node between the first resistor and the first NFET and an output coupled to a gate of the second NFET; a first auxiliary resistor coupled in series with a first auxiliary P-type field effect transistor (PFET), a second auxiliary PFET, a first auxiliary NFET, a second auxiliary NFET and a second auxiliary resistor between the upper voltage supply and the lower voltage supply, a first auxiliary node being located between the second auxiliary PFET and the first auxiliary NFET; and the DAC having a first input, a second input and an output, the first input of the DAC being coupled to a gate of the first auxiliary PFET and to the first auxiliary node, the second input of the DAC being coupled to receive the external digital value, and the output of the DAC being coupled to the intermediate node Nint. ### Claim 8 (depends on 7) The electronic device as recited in claim 7 wherein the DAC includes DAC elements, each DAC element having a DAC resistor coupled in series with a first bias PFET and a second bias PFET between the upper supply voltage and the intermediate node, a gate of the first bias NFET being coupled through a first switch to a first bias voltage and a gate of the second bias NFET being coupled through a second switch to a second bias voltage. ### Claim 9 (depends on 8) The electronic device as recited in claim 8 wherein the first switch and the second switch of a respective DAC element are controlled by a respective bit of the external digital value. ### Claim 10 (depends on 9) The electronic device as recited in claim 9 wherein for an nth DAC element, the first bias PFET, the second bias PFET and the DAC resistor are sized to pass a respective current that is equal to the correction current divided by two to the nth power. ### Claim 11 (depends on 8) The electronic device as recited in claim 8 wherein the bandgap reference circuit includes: a second operational amplifier; a first PFET coupled in series with the transimpedance resistor between an upper voltage supply and the intermediate node, a gate of the first PFET being coupled to an output of the second operational amplifier; a fifth resistor coupled in series with a first bipolar transistor between the intermediate node and the lower supply voltage; a sixth resistor and a seventh resistor coupled in series with a second bipolar transistor between the intermediate node and the lower supply voltage; and a current source coupled in series with a third bipolar transistor between the upper supply voltage and the lower supply voltage, an inverting input of the second operational amplifier being coupled through a first feedback resistor to a third node between the current source and the third bipolar transistor and being further coupled to a fourth node between the fifth resistor and the first bipolar transistor, a non-inverting input of the second operational amplifier being coupled through a second feedback resistor to the third node and being further coupled to a fifth node between the sixth resistor and the seventh resistor. ### Claim 12 (depends on 2) The electronic device as recited in claim 2 wherein the resistance of the transimpedance resistor is less that the resistance of the first resistor. ### Claim 13 (depends on 12) The electronic device as recited in claim 12 wherein the resistance of the transimpedance resistor divided by the resistance of the first resistor is about 0.2. ### Claim 14 (depends on 1) The electronic device as recited in claim 1 wherein the electronic device includes an integrated circuit chip. ### Claim 15 (depends on 14) The electronic device as recited in claim 14 wherein the integrated circuit chip is a stand-alone chip. ### Claim 16 (depends on 14) The electronic device as recited in claim 14 wherein the integrated circuit chip is a system-on-chip. ### Claim 17 A method of operating a precision reference circuit, the method comprising: utilizing a digital-to-analog converter (DAC) to add or substract a correction voltage to a bandgap reference voltage to produce a precision reference voltage, the correction voltage being a fraction of the bandgap reference voltage; providing the precision reference voltage to a circuit. ### Claim 18 (depends on 17) The method of claim 17 where utilizing the DAC includes: coupling the DAC to selectively receive a first bias voltage at respective gates of a plurality of first bias N-type field effect transistors (NFETs); coupling the DAC to receive a second bias voltage at respective gates of a plurality of second bias NFETs from an output of an operational amplifier; coupling an input of the DAC to an intermediate node of a bandgap reference circuit, a transimpedance resistor being coupled between an output of the bandgap reference circuit and the intermediate node; and setting an external digital value for the DAC on a per-chip basis. ### Claim 19 (depends on 18) The method as recited in claim 18 wherein setting the external digital value for the DAC includes: setting a default external digital value; and varying the default external value depending on a bandgap voltage provided by the bandgap reference circuit. ### Claim 20 (depends on 17) The method of claim 17 where utilizing the DAC includes: coupling the DAC to selectively receive a first bias voltage at respective gates of a plurality of first bias P-type field effect transistors (PFETs); coupling the DAC to receive a second bias voltage from an output of an operational amplifier at respective gates of a plurality of second bias PFETs; coupling an output of the DAC to an intermediate node of a bandgap reference circuit, a transimpedance resistor being coupled between an output of the bandgap reference circuit and the intermediate node; and setting an external digital value for the DAC on a per-chip basis.