# US 2021/0239744 A1 · Supply voltage detecting circuit, method of operating the same, electronic device comprising the same and electronic system comprising the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2021/0239744 A1 - Document ID: US20210239744A1 - Status: Published application - Kind: A1 - Application number: 17/036,394 - Filed: 2020-09-29 - Published: 2021-08-05 - Earliest claimed: 2020-01-30 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Cheolhwan LIM; Junhee SHIN; Haejung CHOI; Kwangho KIM; Hyunmyoung KIM - Web page: https://patentgrep.com/patent/US20210239744A1 ## CPC - G01R 19/165: Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values - H03K 17/22: Modifications for ensuring a predetermined initial state when the supply voltage has been applied (bi-stable generators H03K3/12) - G01R 19/16538: {in AC or DC supplies (G01R19/16519 and G01R19/16528 take precedence)} - G06F 1/24: Resetting means - G06F 1/28: Supervision thereof, e.g. detecting power-supply failure by out of limits supervision - H03K 3/037: Bistable circuits - H03K 17/6872: {using complementary field-effect transistors} - G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract An electronic device includes circuitry configured to output a first output signal shifting to a logic high level at a first time in response to a supply voltage reaching a first voltage level, output a second output signal shifting to a logic high level at a second time occurring after the first time in response to the supply voltage reaches a second level higher than the first level; and the circuitry includes an AND gate circuit configured to output a reset signal based on the first output signal and the second output signal. ## Claims ### Claim 1 An electronic device comprising: circuitry configured to, output a first output signal shifting to a logic high level at a first time in response to a supply voltage reaching a first voltage level; output a second output signal shifting to a logic high level at a second time occurring after the first time in response to the supply voltage reaching a second voltage level higher than the first voltage level; and the circuitry including an AND gate circuit configured to, output a reset signal based on the first output signal and the second output signal. ### Claim 2 (depends on 1) The electronic device of claim 1, wherein the circuitry further includes: a first transistor configured to receive the supply voltage, and output the reset signal based on the received supply voltage; and a switch controller configured to apply voltages of different voltage levels to a gate terminal of the first transistor according to a process variation of the first transistor. ### Claim 3 (depends on 2) The electronic device of claim 2, wherein the circuitry further includes a plurality of trim switches configured to determine a level of a voltage applied to the gate terminal of the first transistor; and the switch controller is further configured to select at least one of the plurality of trim switches based on switch selection data. ### Claim 4 (depends on 3) The electronic device of claim 3, wherein the switch controller is further configured to control a switching state of at least one of the plurality of trim switches based on a first enable signal. ### Claim 5 (depends on 3) The electronic device of claim 3, wherein the process variation of the first transistor includes a switching speed of the first transistor; and the switch controller is further configured to control the plurality of trim switches such that a voltage of a lower level is applied to the gate terminal in response to the switching speed of the first transistor being higher. ### Claim 6 (depends on 3) The electronic device of claim 3, wherein the plurality of trim switches further includes a first trim switch and a second trim switch, the first trim switch configured to apply a voltage of a third voltage level to the gate terminal when turned on, and the second trim switch configured to apply a voltage of a fourth voltage level to the gate terminal when turned on, the fourth voltage level lower than the third voltage level; and the switch controller is further configured to provide the first trim switch and the second trim switch with a switching control signal; the first trim switch is further configured to turn on based on the switching control signal when a switching speed of the first transistor reaches a first value; and the second trim switch is further configured to turn on based on the switch control signal when the switching speed of the first transistor reaches a second value, the second value higher than the first value. ### Claim 7 (depends on 1) The electronic device of claim 1, further comprising: at least one external intellectual property (IP) block configured to perform a reset operation based on the reset signal. ### Claim 8 A supply voltage detecting circuit comprising: trim resistance circuitry including an input terminal, an output terminal, and a plurality of trim resistors connected to each other in series, the input terminal configured to receive a supply voltage; a first transistor having a first source/drain terminal electrically connected to the output terminal; a plurality of trim switches that each have first ends connected between the plurality of trim resistors, have second ends connected to a gate terminal of the first transistor, and each of the plurality of trim switches is configured to perform a switching operation in response to a switching control signal; and a switch controller configured to provide the switching control signal for turning on a first trim switch of the plurality of trim switches based on a process variation of the first transistor when the supply voltage reaches a stable level, and the first trim switch configured to apply a voltage dropped by at least some of the plurality of trim resistors from the supply voltage to the gate terminal of the first transistor in response to being turned on. ### Claim 9 (depends on 8) The supply voltage detecting circuit of claim 8, wherein the process variation of the first transistor includes a switching speed of the first transistor. ### Claim 10 (depends on 9) The supply voltage detecting circuit of claim 9, wherein in response to the switching speed of the first transistor having a first value, the first trim switch is further configured to lower the level of the voltage applied to the gate terminal. ### Claim 11 (depends on 10) The supply voltage detecting circuit of claim 10, wherein in response to the switching speed of the first transistor increasing, a combined resistance value of the plurality of trim resistors included between a first end of the first trim switch and the input terminal increases. ### Claim 12 (depends on 8) The supply voltage detecting circuit of claim 8, further comprising: a first capacitor electrically connected to the input terminal and the second ends of the plurality of trim switches. ### Claim 13 (depends on 12) The supply voltage detecting circuit of claim 12, further comprising: an inverter configured to receive a first voltage provided from the first source/drain terminal of the first transistor, invert the first voltage, and output the inverted first voltage. ### Claim 14 (depends on 13) The supply voltage detecting circuit of claim 13, further comprising: a second capacitor configured to receive the supply voltage, wherein the inverter includes a second transistor having a second source/drain terminal and a third source/drain terminal, and the second source/drain terminal is electrically connected to the second capacitor. ### Claim 15 An electronic system comprising: a supply voltage detecting circuit configured to output a first output signal shifting to a logic high level at a first time in response to a supply voltage reaching a first voltage level, output a second output signal shifting to a logic high level at a second time after the first time in response to the supply voltage reaching a second voltage level higher than the first voltage level, and output a reset signal of a logic high level based on the first output signal and the second output signal; and at least one intellectual property (IP) block configured to operate based on the supply voltage and the reset signal. ### Claim 16 (depends on 15) The electronic system of claim 15, further comprising: a first transistor configured to output the reset signal based on the applied supply voltage; and a switch controller configured to apply voltages of different voltage levels to a gate terminal of the first transistor based on a process variation of the first transistor. ### Claim 17 (depends on 16) The electronic system of claim 16, further comprising: a plurality of trim switches each configured to determine a voltage level applied to the gate terminal of the first transistor, wherein the switch controller is further configured to select at least one of the plurality of trim switches based on switch selection data. ### Claim 18 (depends on 17) The electronic system of claim 17, wherein the switch controller is further configured to control a switching state of at least one of the plurality of trim switches based on a first enable signal. ### Claim 19 (depends on 17) The electronic system of claim 17, wherein the process variation of the first transistor includes a switching speed of the first transistor; and the switch controller is further configured to control the plurality of trim switches such that a voltage of a lower level is applied to the gate terminal as the switching speed of the first transistor becomes higher. ### Claim 20 (depends on 17) The electronic system of claim 17, wherein the plurality of trim switches includes a first trim switch configured to apply a voltage of a third voltage level to the gate terminal when turned on, and a second trim switch configured to apply a voltage of a fourth voltage level to the gate terminal when turned on, the fourth voltage level lower than the third voltage level; and the switch controller is further configured to provide the first trim switch and the second trim switch with a switching control signal, the switching control signal causing the first trim switch to turn on when a switching speed of the first transistor has a first value, and causing the second trim switch to turn on when the switching speed of the first transistor has a second value, the second value being higher than the first value.