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US 2021/0232397 A1Published application
Mask patterns generated in memory from seed vectors
AssigneeMicron Technology, Inc.
InventorJeremiah J. Willcock
Life of this patent
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Abstract
The present disclosure includes apparatuses and methods related to mask patterns generated in memory from seed vectors. An example method includes performing operations on a plurality of data units of a seed vector and generating, by performance of the operations, a vector element in a mask pattern.
Claims20
A method, comprising:
- performing a set of operations, including a plurality of different operations, on a plurality of data units of a single seed vector having a predetermined data unit at each bit position;
- and
- generating, by performance of the set including the plurality of different operations, a vector element including a plurality of data units in a mask pattern.
A method, comprising:
- generating a mask pattern including a plurality of data units by performing a plurality of different operations on data units of a single seed vector having a predetermined data unit at each bit position;
- and
- identifying a high bit indicator associated with at least one of a beginning and an end of a vector element;
- wherein the generated mask pattern is selected from a plurality of different mask patterns.
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An apparatus, comprising:
- an array of memory cells configured to store a seed vector having a predetermined data unit at each bit position;
- sensing circuitry coupled to the array;
- and
- a controller configured to control the sensing circuitry and/or the array to perform a plurality of different operations on the seed vector to generate a vector element in a repeating mask pattern.
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Dependencies are inferred from the claim text.