Sputtering target, method for manufacturing sputtering target, and method for forming thin film

A transistor comprising:

• a semiconductor layer;
• a gate electrode overlapping with the semiconductor layer with a gate insulating layer therebetween;
• an insulating layer over the gate electrode;
• and
• a wiring provided over the insulating layer,
• wherein the wiring is electrically connected to the semiconductor layer via a first opening provided in the insulating layer and the gate insulating layer,
• wherein the semiconductor layer comprises a second opening overlapping the first opening, and
• wherein the semiconductor layer is in contact with the wiring at a side surface of the second opening.

A transistor comprising:

• a semiconductor layer;
• a gate electrode overlapping with the semiconductor layer with a gate insulating layer therebetween;
• an insulating layer over the gate electrode;
• and
• a wiring provided over the insulating layer,
• wherein the wiring is electrically connected to the semiconductor layer via a first opening provided in the insulating layer and the gate insulating layer,
• wherein the semiconductor layer comprises a second opening overlapping the first opening,
• wherein the semiconductor layer is in contact with the wiring at a side surface of the second opening, and
• wherein the wiring has a region in contact with an electrode below the semiconductor layer via the first opening and the second opening.

A transistor comprising:

• a first insulating layer;
• a semiconductor layer over and in contact with the first insulating layer;
• a gate electrode overlapping with the semiconductor layer with a gate insulating layer therebetween;
• a second insulating layer over the gate electrode;
• and
• a wiring provided over the second insulating layer,
• wherein the wiring is electrically connected to the semiconductor layer via a first opening provided in the second insulating layer and the gate insulating layer,
• wherein the semiconductor layer comprises a second opening overlapping the first opening,
• wherein the semiconductor layer is in contact with the wiring at a side surface of the second opening,
• wherein the wiring has a region in contact with an electrode below the semiconductor layer via the first opening and the second opening, and
• wherein the electrode and the wiring extend beyond an end portion of the semiconductor layer in a cross-sectional view.

A transistor comprising:

• a first insulating layer;
• a semiconductor layer in contact with the first insulating layer;
• a gate electrode overlapping with the semiconductor layer with a gate insulating layer therebetween;
• a second insulating layer over the first insulating layer;
• a first conductive layer provided over the second insulating layer;
• and
• a second conductive layer overlapping with the the first conductive layer with the second insulating layer therebetween,
• wherein the first conductive layer is electrically connected to the semiconductor layer via a first opening provided in the gate insulating layer,
• wherein the semiconductor layer comprises a second opening overlapping the first opening, and
• wherein the first conductive layer and the second conductive layer are electrically connected to each other via the first opening and the second opening, and
• wherein a top surface of the semiconductor layer is provided above a bottom surface of the first conductive layer and a bottom surface of the second conductive layer.