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US 2021/0224151 A1Published application
Apparatus and method for handling a data error in a memory system
AssigneeSK hynix Inc.
InventorJaeyoon LEE
Life of this patent
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Abstract
A memory system includes a memory device and a controller. The memory device is configured to supply a read voltage into a plurality of non-volatile memory cells and transfer values obtained from the plural non-volatile memory cells. The controller is coupled to the memory device via at least one channel. The controller adjusts a level of the read voltage based on a cell difference probability (CDP) calculated from the values when a read operation to the plurality of non-volatile memory cells fails.
Claims20
A memory system, comprising:
- a memory device configured to supply a read voltage into a plurality of non-volatile memory cells and output values obtained from the plurality of non-volatile memory cells;
- and
- a controller, coupled to the memory device via at least one channel, configured to adjust a level of the read voltage based on a cell difference probability (CDP) calculated from the values when a read operation to the plurality of non-volatile memory cells fails.
A method for operating a memory system, comprising:
- supplying a read voltage to a plurality of non-volatile memory cells to perform a read operation regarding values stored in the plurality of non-volatile memory cells;
- calculating a cell difference probability (CDP) based on the values read from the plurality of non-volatile memory cells when the read operation has failed;
- and
- adjusting the read voltage based on the cell difference probability.
1 more element
Dependencies are inferred from the claim text.