Interleaved multi-level buck-boost switching power converter

A method of operating an interleaved buck-boost converter, comprising:

• generating an error signal responsive to a difference between an output voltage for an output filter and a reference voltage;
• generating a first ramp signal responsive to a first edge of a clock signal;
• generating a second ramp signal responsive to a second edge of the clock signal;
• in a master switching stage including a first flying capacitor, charging an input terminal for the output filter to twice an input voltage over a master magnetizing period that begins responsive to the first edge of a clock signal and ends responsive to the second ramp signal exceeding the error signal;
• and
• in a slave switching stage including a second flying capacitor, charging the input terminal to the input voltage during a first sub-level cycle extending from a termination of the master magnetizing period to a subsequent first edge of the clock signal.

An interleaved cascaded buck-boost converter, comprising:

• an input voltage terminal configured to provide an input voltage;
• an output filter including an inductor having an input terminal and an output capacitor for an output voltage;
• an error amplifier configured to drive an error signal responsive to a difference between the output voltage and a reference voltage;
• a master switching stage having four master switches and a first flying capacitor;
• a slave switching stage having four slave switches and a second flying capacitor;
• a cascade switch coupled between the master switching stage and the slave switching stage;
• and
• a pulse width modulation (PWM) controller configured to configure the master switching stage into a master magnetizing switching state in which the input terminal is charged to three times an input voltage during a master magnetizing period extending from a reset of a first ramp signal until a second ramp signal exceeds the error signal, and
• wherein the PWM controller is further configured to configure the slave switching stage into a slave de-magnetizing switching state in which the input terminal is charged to two times the input voltage during a slave magnetizing period extending from a reset of the second ramp signal until the first ramp signal exceeds the error signal, and wherein the PWM controller is further configured to close the cascade switch during the slave magnetizing period to charge the first flying capacitor to twice the input voltage.