Display substrate and display device

A display substrate, comprising:

• a base substrate, and
• a plurality of sub-pixels on the base substrate,
• wherein the plurality of sub-pixels are arranged in a sub-pixel array in a first direction and a second direction, the first direction intersecting with the second direction,
• at least one of the plurality of sub-pixels comprises a first transistor, a second transistor, a third transistor, and a storage capacitor on the base substrate,
• the storage capacitor comprises a first capacitor electrode, a second capacitor electrode and a third capacitor electrode, and the second capacitor electrode is electrically connected with the third capacitor electrode;
• a first electrode of the second transistor is electrically connected to the first capacitor electrode of the storage capacitor and a gate electrode of the first transistor, a second electrode of the second transistor is configured to receive a data signal, a gate electrode of the second transistor is configured to receive a first control signal, and the second transistor is configured to write the data signal to the gate electrode of the first transistor and the storage capacitor in response to the first control signal,
• a first electrode of the first transistor is electrically connected to a second capacitor electrode of the storage capacitor and configured to be electrically connected to a light emitting element, a second electrode of the first transistor is configured to receive a first power voltage, and the first transistor is configured to control a current for driving the light emitting element under control of a voltage of the gate electrode of the first transistor,
• a first electrode of the third transistor is electrically connected with the first electrode of the first transistor and a second capacitor electrode of the storage capacitor, a second electrode of the third transistor is configured to be connected with a detection circuit, a gate electrode of the third transistor is configured to receive a second control signal, and the third transistor is configured to detect an electrical characteristic of the sub-pixel to which the third transistor belongs by the detection circuit in response to the second control signal;
• the second capacitor electrode is on a side of the first capacitor electrode close to the base substrate, the third capacitor electrode is on a side of the first capacitor electrode away from the base substrate, and the first capacitor electrode is at least partially overlapped with the second capacitor electrode and the third capacitor electrode in a direction perpendicular to the base substrate;
• the first capacitor electrode has a first capacitor electrode side and a second capacitor electrode side opposite to each other in the second direction, and the second capacitor electrode has a third capacitor electrode side and a fourth capacitor electrode side opposite to each other in the second direction;
• an orthographic projection of the first capacitor electrode side on the base substrate and an orthographic projection of the second capacitor electrode side on the base substrate are between an orthographic projection of the third capacitor electrode side on the base substrate and an orthographic projection of the fourth capacitor electrode side on the base substrate.