US 2021/0202518 A1 · MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME

Abstract

A memory device includes a substrate. A first dielectric layer is disposed over the substrate. A plurality of conductive layers and a plurality of dielectric layers are alternately and horizontally disposed on the substrate. A channel column structure is disposed on the substrate and in the conductive layers and the dielectric layers. A side wall of the channel column structure is in contact with the plurality of conductive layers. A second dielectric layer covers the first dielectric layer. A conductive column structure is in the first and second dielectric layers, adjacent to the channel column structure, and in contact with one of the plurality of conductive layers. The conductive column structure includes a liner insulating layer as a shell layer.

Claims20

Dependent claims

A memory device, comprising:

a substrate;
a first dielectric layer disposed over the substrate;
a plurality of conductive layers and a plurality of dielectric layers alternately and horizontally disposed on the substrate;
a channel column structure disposed on the substrate and in the plurality of conductive layers and the plurality of dielectric layers, wherein a side wall of the channel column structure is in contact with the plurality of conductive layers;
a second dielectric layer covering the first dielectric layer;
and
a conductive column structure in the first and second dielectric layers, adjacent to the channel column structure, and in contact with one of the plurality of conductive layers, wherein the conductive column structure comprises a liner insulating layer as a shell layer.

4 more elements

A method for fabricating a memory device, comprising:

providing a substrate;
forming a first dielectric layer over the substrate;
forming a plurality of conductive layers and a plurality of dielectric layers alternately and horizontally disposed on the substrate;
forming, a channel column structure on the substrate and in the plurality of conductive layers and the plurality of dielectric layers, wherein a side wall of the channel column structure is in contact with the plurality of conductive layers;
forming a second dielectric layer covering the first dielectric layer;
and
forming, in the first and second dielectric layers, a conductive column structure adjacent to the channel column structure and in contact with one of the plurality of conductive layers, wherein the conductive column structure comprises a liner insulating layer as a shell layer.

4 more elements

Dependencies are inferred from the claim text.

Memory device and method for fabricating the same

Life of this patent

Memory device and method for fabricating the same

Life of this patent

Abstract

Claims20