Integrated circuits including multi-layer conducting lines
AssigneeSamsung Electronics Co., Ltd.
InventorsTae-hyung KIM, Chan-Ho LEE
Life of this patent
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Abstract
An integrated circuit includes a plurality of layers stacked in a first direction, a plurality of unit circuits at least partially overlapping each other in a second direction that is perpendicular to the first direction and configured to operate in parallel with one another, control circuitry configured to generate a control signal to control the plurality of unit circuits, and a multi-layer conducting line configured to transfer the control signal from the control circuitry to the plurality of unit circuits. The multi-layer conducting line may be integrally formed in a wiring layer and a via layer and extends in the second direction. The wiring layer and the via layer may be adjacent to each other.
Claims20
An integrated circuit, comprising:
- A conductive linear pattern including a first linear pattern and a second linear pattern, the first linear pattern extending in a second direction perpendicular to a first direction in a first wiring layer and the second linear pattern extending in the second direction in a first via layer;
- and
- a barrier layer formed between the first linear pattern and the second linear pattern,
- wherein the second linear pattern continuously extends along the first linear pattern,
- wherein the first linear pattern, the second linear pattern, and the barrier layer are stacked such that the first linear pattern and the second linear pattern are part of a single conductive wire,
- wherein a width of the first linear pattern tapers downwardly to an inwardly extending offset-step, and
- wherein a length of the first linear pattern is greater than a length of the second linear pattern.
An integrated circuit, comprising:
- a conductive linear pattern including a first linear pattern and a second linear pattern, the first linear pattern extending in a second direction perpendicular to a first direction in a first wiring layer and the second linear pattern extending in the second direction in a first via layer;
- a barrier layer formed between the first linear pattern and the second linear pattern;
- and
- a plurality of unit circuits arranged in the second direction,
- wherein the second linear pattern continuously extends along the first linear pattern,
- wherein a width of the first linear pattern tapers downwardly to an inwardly extending offset-step, and
- wherein a length of the first linear pattern is greater than a length of the second linear pattern.
Dependencies are inferred from the claim text.