Semiconductor package and method of manufacturing the same

A method of manufacturing a semiconductor package, the method comprising:

• forming a first substrate including a redistribution layer;
• providing a second substrate including a semiconductor chip electrically connected to the redistribution layer and an interconnection layer on the first substrate;
• forming a first encapsulation layer covering the second substrate;
• and
• forming a via structure penetrating the first encapsulation layer,
• the forming the via structure including forming a first via hole in the first encapsulation layer, forming a photosensitive material layer provided in the first via hole and covering a top surface of the first encapsulation layer, exposing and developing the photosensitive material layer in the first via hole to form a second encapsulation layer having a second via hole, and filling the second via hole with a conductive material,
• a sidewall of the via structure having a first surface and a second surface,
• the first surface of the sidewall of the via structure being inclined with respect to a top surface of the second substrate, and
• the second surface of the sidewall of the via structure being inclined with respect to each of the first surface of the sidewall of the via structure and the top surface of the second substrate.

A semiconductor package comprising:

• a lower insulating layer including an under-bump metal layer;
• a solder ball on a bottom surface of the lower insulating layer and connected to the under-bump metal layer;
• a first substrate on a top surface of the lower insulating layer, the first substrate including a redistribution layer;
• a second substrate including a semiconductor chip electrically connected to the redistribution layer and an interconnection layer, the second substrate having a through-hole exposing the redistribution layer in a region surrounding the semiconductor chip;
• a first encapsulation layer covering the second substrate and having a first via hole, the first encapsulation layer filling the through-hole;
• a second encapsulation layer covering the first encapsulation layer and having a second via hole in the first via hole, a diameter of the second via hole being less than a diameter of the first via hole;
• a via structure filling the second via hole, a sidewall of the via structure having a first surface and a second surface, the first surface of the sidewall of the via structure being inclined with respect to a top surface of the second substrate, the second surface of the sidewall of the via structure being inclined with respect to each of the first surface of the sidewall of the via structure and the top surface of the second substrate;
• and
• an upper insulating layer covering a portion of the via structure and a top surface of the second encapsulation layer.