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US 2021/0202027 A1Published application
Memory-based processors
AssigneeNeuroBlade Ltd.
InventorsElad SITY, Eliad HILLEL
Life of this patent
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Abstract
A memory chip may include: a plurality of memory banks; a data storage configured to store access information indicative of access operations for one or more segments of the plurality of memory banks; and a refresh controller configured to perform a refresh operation of the one or more segments based, at least in part, on the stored access information.
Claims40
1-149. (canceled)
An integrated circuit, comprising:
- a substrate;
- a memory array disposed on the substrate;
- a processing array disposed on the substrate;
- and
- an interface disposed on the substrate;
- wherein the memory array comprises multiple memory banks;
- wherein the processing array comprises a plurality of testing units;
- wherein the plurality of testing units are configured to test the multiple memory banks to provide test results;
- and
- wherein the interface is configured to output, outside the integrated circuit, information indicative of the test results.
7 more elements
180-217. (canceled)
A method for testing memory banks of an integrated circuit, the method comprises:
- receiving by an interface of an integrated circuit, configuration information that comprises instructions, the integrated circuit comprising a substrate, a memory array that comprises memory bank and is disposed on the substrate, a processing array disposed on the substrate;
- and an interface disposed on the substrate;
- executing, by the processing array, the instructions by accessing the memory array, performing computational operations and provide result;
- and
- outputting, by the interface and outside the integrated circuit, information indicative of the results.
2 more elements
Dependencies are inferred from the claim text.