US 2021/0202016 A1 · HIGH-VOLTAGE SHIFTER WITH DEGRADATION COMPENSATION

Abstract

Discussed herein are systems and methods for compensating degradation of a transistor in a high-voltage (HV) shifter configured to transfer an input voltage to an access line, such as a global wordline. An embodiment of a memory device comprises a group of memory cells, and a HV shifter circuit including a signal transfer circuit and a compensator circuit. The signal transfer circuit includes a P-channel transistor to transfer a high-voltage input to an access line. The compensator circuit can provide a control signal to the signal transfer circuit by coupling a support voltage higher than a supply voltage (Vcc) to the signal transfer circuit for a specified time period to compensate for degradation of the P-channel transistor. The transferred high voltage is used to charge the access line to selectively read, program, or erase memory cells.

Claims20

Dependent claims

A memory device, comprising:

a group of memory cells;
and
a memory controller operable to perform operations comprising:
transferring a high-voltage input received at a voltage input port of the memory device to an access line through a voltage transfer path comprising a high-voltage transistor, the access line coupled to multiple memory cells of the group of memory cells;
and
during the transfer of the high-voltage input, applying, via a first N-channel transistor, a support voltage higher than a supply voltage (Vcc) to the voltage transfer path until a monitored condition at a selected node is satisfied to relax gate-to-channel stress of the high-voltage transistor of the voltage transfer path.

3 more elements

Dependencies are inferred from the claim text.

High-voltage shifter with degradation compensation

Life of this patent

High-voltage shifter with degradation compensation

Life of this patent

Abstract

Claims20