Apparatuses including input buffers and methods for operating input buffers

An apparatus, comprising:

• a first input buffer circuit configured to receive input, data and further configured to provide first output data;
• and
• a second input buffer circuit configured to receive the input data and further configured to provide second output data,
• wherein each input buffer circuit of the first and second input buffer circuits comprises:
• a sense circuit configured to receive the input data, configured to compare a voltage of the input data with a reference voltage and provide first and second voltages to first and second sense nodes, respectively, based on the comparison:
• a decision feedback equalizer coupled to the first and second sense nodes and configured to concurrently provide first and second capacitances to the first and second sense nodes;
• and
• a latch circuit coupled to the sense circuit and configured to latch and provide output data having logic levels based on the first and second voltages,
• wherein the output data provided by the latch circuit of the first input buffer circuit is the first output data and the output data provided by the latch circuit of the second input buffer circuit is the second output data, and
• wherein the decision feedback back equalizer of the second input buffer circuit is configured to provide the first and second capacitances responsive to the first output data.

A method, comprising:

• receiving first input data;
• providing first output data responsive to the input data;
• receiving second input data;
• comparing a voltage of the second input data with a reference voltage;
• providing first and second voltages to first and second sense nodes, respectively, based on the comparison;
• providing first and second capacitances to the first and second sense nodes based on the first output data to set the reference voltage;
• and
• latching and providing second output data having logic levels based on the first and second voltages.