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US 2021/0201960 A1Published application
Semiconductor device structure
AssigneeEtron Technology, Inc.
InventorsChao-Chun Lu, Li-Ping Huang
Life of this patent
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Abstract
A semiconductor device structure includes a silicon substrate, a transistor, and an interconnection. The silicon substrate has a silicon surface. The transistor includes a gate structure, a first conductive region, a second conductive region, and a channel under the silicon surface. The interconnection is extended beyond the transistor and coupled to the first conductive region of the transistor. The interconnection is disposed under the silicon surface and isolated from the silicon substrate by an isolation region.
Claims29
A semiconductor device structure comprising:
- a silicon substrate with a silicon surface;
- a transistor comprising a gate structure, a first conductive region, a second conductive region, and a channel under the silicon surface;
- and
- an interconnection extended beyond the transistor and coupled to the first conductive region of the transistor;
- wherein the interconnection is disposed under the silicon surface and isolated from the silicon substrate by an isolation region.
2 more elements
A semiconductor device structure comprising:
- a silicon substrate with a silicon surface;
- a transistor comprising a gate structure, a first conductive region, a second conductive region, and a channel under the silicon surface;
- and
- an interconnection extended beyond the transistor and coupled to the gate structure of the transistor;
- wherein the interconnection comprises an upper portion which is above the silicon surface, and a sidewall of the upper portion of the interconnection is aligned with a sidewall of the gate structure.
2 more elements
A semiconductor device structure comprising:
- a silicon substrate with a silicon surface;
- a transistor comprising a gate structure, a first conductive region, a second conductive region, and a channel under the silicon surface;
- and
- an interconnection extended beyond the transistor and electrically coupled to the first conductive region of the transistor through a bridge contact;
- wherein a first sidewall of the bridge contact is aligned with an edge of the first conductive region and a second sidewall of the bridge contact is aligned with an edge of the interconnection.
2 more elements
A semiconductor device structure comprising:
- a silicon substrate with a silicon surface;
- a first transistor comprising a gate structure, a first conductive region, a second conductive region, and a channel under the silicon surface;
- and
- an interconnection electrically coupled to the first conductive region of the first transistor through a bridge contact;
- wherein the interconnection is positioned under the silicon surface and an isolation cap is disposed on the bridge contact to isolate the bridge contact;
- wherein the bridge contact comprises an upper portion and a lower portion, and at least a first sidewall of the lower portion of the bridge contact abuts against an isolating layer, and an edge of the isolation cap is aligned with an edge of the isolating layer.
3 more elements
A semiconductor device structure, comprising:
- a silicon substrate with a silicon surface;
- a trench, wherein at least part of the trench formed under the silicon surface;
- and
- a first spacer covering a first side of the trench and a second spacer covering a second side of the trench;
- wherein a material of the first spacer is different from a material of the second spacer.
2 more elements
A semiconductor device structure, comprising:
- a silicon substrate with a silicon surface;
- a first interconnection disposed under the silicon surface;
- and
- a second interconnection disposed under the silicon surface;
- wherein a depth of the first interconnection from the silicon surface is substantially a same as a depth of the second interconnection from the silicon surface, and the first interconnection is separated from the second interconnection.
2 more elements
A semiconductor device structure comprising:
- a silicon substrate with a silicon surface;
- a first transistor comprising a gate structure, a first conductive region, a second conductive region, and a channel under the silicon surface;
- a bridge contact comprising an upper portion and a lower portion, wherein the bridge contact is electrically coupled to the first conductive region of the first transistor;
- and
- an interconnection positioned under the silicon surface and contacting the lower portion of the bridge contact.
2 more elements
A semiconductor device structure comprising:
- a silicon substrate with a silicon surface;
- an NMOS (n-type metal-oxide-semiconductor) transistor comprising a gate structure, a first conductive region, and a first channel under the silicon surface;
- a PMOS (p-type metal-oxide-semiconductor) transistor comprising a gate structure, a second conductive region, and a second channel under the silicon surface;
- a bridge contact comprising an upper portion and a lower portion, wherein the bridge contact is electrically coupled to the first conductive region of the NMOS transistor and electrically coupled to the second conductive region of the PMOS transistor;
- and
- an interconnection positioned under the silicon surface and contacting the lower portion of the bridge contact.
3 more elements
Dependencies are inferred from the claim text.