Display device and electronic apparatus

A display device comprising:

• a substrate a plurality of pixel circuits, each of the pixel circuits including a sampling transistor, a driving transistor, a first switching transistor, a second switching transistor, a capacitive element and a light emitting element;
• a plurality of scanning lines including a first scanning line, a second scanning line and a third scanning line, the first scanning line being connected to a control terminal of the sampling transistor, the second scanning line being connected to a control terminal of the first transistor, and the third scanning line being connected to a control terminal of the second transistor;
• and
• a plurality of signal lines, and the signal line being connected to a first terminal of the sampling transistor, wherein
• the first and the second scanning lines are located in a first interconnection layer,
• the signal line is located in a second interconnection layer,
• the first and the second scanning lines extend in a first direction,
• the signal line extends in a second direction perpendicular to the first direction, and
• the first interconnection layer is located between the substrate and the second interconnection layer.

An electronic apparatus comprising:

• a display device which performs display on a basis of a video signal,
• wherein the display device includes
• a substrate
• a plurality of pixel circuits, each of the pixel circuits including a sampling transistor, a driving transistor, a first switching transistor, a second switching transistor, a capacitive element and a light emitting element;
• a plurality of scanning lines including a first scanning line, a second scanning line and a third scanning line, the first scanning line being connected to a control terminal of the sampling transistor, the second scanning line being connected to a control terminal of the first transistor, and the third scanning line being connected to a control terminal of the second transistor;
• and
• a plurality of signal lines, and the signal line being connected to a first terminal of the sampling transistor, wherein
• the first and the second scanning lines are located in a first interconnection layer,
• the signal line is located in a second interconnection layer,
• the first and the second scanning lines extend in a first direction,
• the signal line extends in a second direction perpendicular to the first direction, and
• the first interconnection layer is located between the substrate and the second interconnection layer.