Method and apparatus with neural network data input and output control

A processor-implemented neural network deep learning data control method comprising:

• receiving a data sequence;
• generating a compressed data sequence in which consecutive invalid bits in a bit string of the data sequence are compressed into a single bit of the compressed data sequence;
• generating a validity determination sequence to determine a valid bit and an invalid bit in a bit string of the compressed data sequence;
• writing the compressed data sequence and the validity determination sequence to a memory;
• reading the compressed data sequence and the validity determination sequence from the memory;
• and
• determining a bit in the bit string of the compressed data sequence set for transmission to a neural network circuit, based on the validity determination sequence, such that the neural network circuit omits an operation with respect to non-consecutive invalid bits.

A processor-implemented neural network data control method comprising:

• receiving a data sequence indicating connection strengths of connections between nodes of a neural network;
• generating a compressed data sequence comprising a bit of the data sequence that is greater than a threshold and a bit having a value determined based on a number of consecutive bits of the data sequence that are less than or equal to the threshold;
• and
• training the neural network by performing a dropout operation of the one or more connections based on the compressed data sequence.