Managing storage of multiple plane parity data in a memory sub-system

A non-transitory computer readable medium comprising instructions, which when executed by a processing device, cause the processing device to perform operations comprising:

• detecting an error associated with host data written to a page of a storage area of a memory sub-system including a set of multiple planes;
• retrieving a first set of parity data from a cache memory of a controller of the memory sub-system, wherein the first set of parity data is generated based on less than a total number of planes of the host data;
• and
• performing a data recovery operation based at least in part on the first set of parity data.

A system comprising:

• a memory device;
• and
• a processing device, operatively coupled with the memory device, to perform operations comprising:
• receiving host data to be written to a storage area including a set of multiple planes;
• executing a first parity generation operation based on a portion of the set of multiple planes of the host data to generate a set of multi-plane parity data;
• storing the set of multi-plane parity data in a cache memory of a controller of a memory sub-system;
• executing a second parity generation operation based on the set of the multiple planes of the host data to generate a set of multi-page parity data;
• storing the set of multi-page parity data in the cache memory of the controller of the memory sub-system;
• and
• performing a data recovery operation based on the set of multi-plane parity data and the set of multi-page parity data.