Memory devices for performing repair operation, memory systems including the same, and operating methods thereof
AssigneeSamsung Electronics Co., Ltd.
InventorYongsang Park
Life of this patent
Estimating the term…
Abstract
A memory device includes a mode register set configured to store a first repair mode, a second repair mode, and a second repair off mode, and a repair control circuit configured to perform a first repair operation for permanently repairing a first wordline corresponding to a defective address to a first redundancy wordline in the first repair mode, to perform a second repair operation for temporarily repairing the first wordline corresponding to the defective address to a second redundancy wordline in the second repair mode, and to turn off a repair logic that is configured to perform the second repair operation in the second repair off mode to access old data after the second repair operation.
Claims21
A memory device comprising:
- a mode register set configured to store a first repair mode, a second repair mode, and a second repair off mode;
- and
- a repair control circuit configured to perform a first repair operation for permanently repairing a first wordline corresponding to a defective address to a first redundancy wordline in the first repair mode, to perform a second repair operation for temporarily repairing the first wordline corresponding to the defective address to a second redundancy wordline in the second repair mode, and to turn off a repair logic that is configured to perform the second repair operation in the second repair off mode to access old data after the second repair operation.
-16. (canceled)
An operating method of a memory device, the method comprising:
- performing a repair operation for replacing a wordline corresponding to an address with a redundancy wordline in response to a repair request from an external device;
- receiving old data access information from the external device;
- and
- outputting old data from memory cells connected to the wordline corresponding to the address in response to a read request from the external device after the receiving the old data access information.
A memory system comprising:
- at least one memory device;
- and
- a controller configured to control the at least one memory device,
- wherein the at least one memory device is configured to turn off a soft post package repair (sPPR) logic in response to old data access information after performing an sPPR operation, and to output old data from memory cells connected to a normal wordline or a repair wordline corresponding to an address of the controller.
Dependencies are inferred from the claim text.