Signalling for heterogeneous memory systems
AssigneeAdvanced Micro Devices, Inc.
InventorsJames R. Magro, Kedarnath Balakrishnan
Life of this patent
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AssigneeAdvanced Micro Devices, Inc.
InventorsJames R. Magro, Kedarnath Balakrishnan
Estimating the term…
A memory controller interfaces with a non-volatile storage class memory (SCM) module over a heterogenous memory channel, and includes a command queue for receiving memory access commands. A memory interface queue is coupled to the command queue for holding outgoing commands. A non-volatile command queue is coupled to the command queue for storing non-volatile read commands that are placed in the memory interface queue. An arbiter selects entries from the command queue, and places them in the memory interface queue for transmission over a heterogenous memory channel. A control circuit is coupled to the heterogenous memory channel for receiving a ready response from the non-volatile SCM module indicating that responsive data is available for a non-volatile read command, and in response to receiving the ready response, causing a send command to be placed in the memory interface queue for commanding the non-volatile SCM module to send the responsive data.
A memory controller, comprising:
A method, comprising:
A data processing system, comprising:
Dependencies are inferred from the claim text.