Method, device and terminal for testing memory chip
AssigneeChangxin Memory Technologies, Inc.
InventorsTianchen LU, Ruei-Yuan GUO
Life of this patent
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Abstract
The present disclosure provides a method, a device and a terminal for testing a memory chip. The method may include setting an attack mode and random attack parameters, generating a random attack command according to the attack mode and random attack parameters, attacking the memory chip according to the random attack command, and testing the attacked memory chip and generating a test result. This method is able to simulate various types of attacks and can thus perform a suitable test on the memory chip for the types of the actual attack. In addition, since the attacks can be randomized to any memory cell of the memory chip, testing of the whole memory chip is made possible.
Claims16
A method for testing a memory chip, comprising:
- setting an attack mode and random attack parameters;
- generating a random attack command according to the attack mode and random attack parameters;
- attacking the memory chip according to the random attack command;
- and
- testing the attacked memory chip and generating a test result.
A device for testing a memory chip, comprising:
- an attack configuration module, configured to set an attack mode and random attack parameters;
- an attack command generation module, configured to generate a random attack command according to the attack mode and random attack parameters;
- a random attack module, configured to attack the memory chip according to the random attack command;
- and
- an attack testing module, configured to test the attacked memory chip and generate a test result.
A terminal for testing a memory chip under a random attack, comprising a device for testing a memory chip, wherein the terminal comprises:
- a processor;
- and
- a computer-readable storage unit comprising executable instructions, when executed, causing the processor to perform operations including:
- setting an attack mode and random attack parameters;
- generating a random attack command according to the attack mode and random attack parameters;
- attacking the memory chip according to the random attack command;
- and
- testing the attacked memory chip and generating a test result.
Dependencies are inferred from the claim text.