An active matrix substrate including a plurality of pixel areas arranged in a matrix in a row direction and a column direction, the plurality of pixel areas including a plurality of pixel rows and a plurality of pixel columns, the active matrix substrate comprising:
- a substrate having a main surface;
- a plurality of light blocking layers provided on the main surface of the substrate;
- a lower insulating layer provided to cover the plurality of light blocking layers;
- pixel TFTs, each pixel TFT being provided corresponding to each of the plurality of pixel areas, the pixel TFT including an oxide semiconductor layer provided on the lower insulating layer, a gate insulating layer provided on the oxide semiconductor layer, and a gate electrode provided to face the oxide semiconductor layer with the gate insulating layer interposed between
- the gate electrode and the oxide semiconductor layer;
- a plurality of gate wiring lines extending in the row direction, each gate wiring line being formed from a conductive film the same as the gate electrode;
- a plurality of source wiring lines extending in the column direction;
- pixel electrodes, each pixel electrode being provided in each of the plurality of pixel areas and electrically connected to the pixel TFT;
- an interlayer insulating layer provided to cover the oxide semiconductor layer, the gate electrode, and the plurality of gate wiring lines;
- a common electrode provided on the interlayer insulating layer and including a plurality of segments, each segment being capable of functioning as a touch sensor electrode;
- and
- a plurality of touch wiring lines extending in the column direction, each touch wiring line being connected to the corresponding touch sensor electrode,
- wherein the oxide semiconductor layer includes a channel region, a first low-resistive region, and a second low-resistive region, the first low-resistive region and the second low-resistive region being located on both sides of the channel region and having specific resistances lower than the channel region, the first low-resistive region being connected to any one of the plurality of source wiring lines,
- the plurality of source wiring lines and the plurality of touch wiring lines are located between the main surface of the substrate and the lower insulating layer, and are formed from a conductive film the same as the plurality of light blocking layers,
- the pixel electrode is formed from an oxide film the same as the oxide semiconductor film, and is continuous with the second low-resistive region in the oxide semiconductor layer,
- the plurality of gate wiring lines and the plurality of source wiring lines are arranged such that a pair of gate wiring lines are connected to one pixel row and one source wiring line is connected to a pair of pixel columns, the pair of pixel columns including a first pixel column and a second pixel column adjacent to the first pixel column, and
- when viewed from a normal direction of the main surface of the substrate, each of the plurality of source wiring lines is disposed between the first pixel column and the second pixel column in the corresponding pair of pixel columns, and each of the plurality of touch wiring lines is disposed between two adjacent pixel columns between two adjacent source wiring lines of the plurality of source wiring lines.