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US 2021/0199703 A1Published application
Appratus and methods for determination of capacitive and resistive characteristics of access lines
AssigneeMicron Technology, Inc.
InventorsDan Xu, Jun Xu, Erwin E. Yu
Life of this patent
Estimating the term…
Abstract
Apparatus having an array of memory cells and a controller for access of the array of memory cells, wherein the controller is configured to cause the apparatus to determine capacitance and/or resistance values of an access line in response to applying a reference current to the access line, wherein the access line is connected to control gates of memory cells of the array of memory cells.
Claims20
An apparatus, comprising:
- an array of memory cells;
- a plurality of access lines, wherein each access line of the plurality of access lines is connected to control gates of a respective plurality of memory cells of the array of memory cells;
- and
- a controller for access of the array of memory cells, wherein the controller is configured to cause the apparatus to:
- apply a reference current to a selected access line of the plurality of access lines;
- identify a first event when a voltage level of a near end of the selected access line is deemed to exceed a first voltage level while applying the reference current;
- identify a second event when the voltage level of the near end of the selected access line is deemed to exceed a second voltage level, higher than the first voltage level, while applying the reference current;
- and
- determine a capacitance value of the selected access line in response to a current level of the reference current, a time difference between the second event and the first event, and a voltage difference between the second voltage level and the first voltage level.
6 more elements
An apparatus, comprising:
- an array of memory cells;
- a plurality of access lines, wherein each access line of the plurality of access lines is connected to control gates of a respective plurality of memory cells of the array of memory cells;
- and
- a controller for access of the array of memory cells, wherein the controller is configured to cause the apparatus to:
- apply a reference current to a selected access line of the plurality of access lines;
- isolate the selected access line from the reference current in response to a voltage level of a near end of the selected access line being deemed to exceed a particular voltage level while applying the reference current;
- determine a resting voltage level of the selected access line after isolating the selected access line from the reference current;
- and
- determine a resistance value of the selected access line in response to a current level of the reference current and a voltage difference between the particular voltage level and the resting voltage level.
6 more elements
An apparatus, comprising:
- an array of memory cells;
- a plurality of access lines, wherein each access line of the plurality of access lines is connected to control gates of a respective plurality of memory cells of the array of memory cells;
- and
- a controller for access of the array of memory cells, wherein the controller is configured to cause the apparatus to:
- apply a reference current to a selected access line of the plurality of access lines;
- identify a first event when a voltage level of a near end of the selected access line is deemed to exceed a first voltage level while applying the reference current;
- identify a second event when the voltage level of the near end of the selected access line is deemed to exceed a second voltage level, higher than the first voltage level, while applying the reference current;
- isolate the selected access line from the reference current in response to identifying the second event;
- determine a resting voltage level of the selected access line after isolating the selected access line from the reference current;
- determine a resistance value of the selected access line in response to a current level of the reference current and a voltage difference between the second voltage level and the resting voltage level;
- and
- determine a capacitance value of the selected access line in response to the current level of the reference current, a time difference between the second event and the first event, and a voltage difference between the second voltage level and the first voltage level.
9 more elements
Dependencies are inferred from the claim text.