Inspection apparatus and manufacturing method for semiconductor device

A manufacturing method for a semiconductor device, the method comprising:

• a first forming step of forming a first pattern by connecting exposure processing, wherein the connecting exposure processing is a processing in which a first partial pattern and a second partial pattern are exposed such that the fist partial pattern and the second partial pattern are connected;
• a second forming step of forming a second pattern by single-batch exposure processing;
• and
• an acquiring step of acquiring information representing a positional relation between the first pattern and the second pattern,
• wherein the first pattern has a first inspection mark group including at least three inspection marks formed by exposure of the first partial pattern, and a second inspection mark group including at least three inspection marks formed by exposure of the second partial pattern,
• wherein the first inspection mark group and the second inspection mark group are each arranged such that a first straight line and a second straight line intersect, the first straight being a line connecting a first inspection mark and a second inspection mark out of the three inspection marks, and the second straight line being a line connecting a third inspection mark and the first inspection mark out of the three inspection marks, and
• wherein the information is acquired using the three inspection marks of the first inspection mark group and the three inspection marks of the second inspection mark group, and an inspection mark included in the second pattern.

A manufacturing method for a semiconductor device, the method comprising:

• a step of preparing a wafer including a substrate and an insulator layer disposed on the substrate;
• a step of forming a wiring layer on the wafer by connecting exposure processing, wherein the connecting exposure processing is a processing in which a plurality of partial patterns are connected;
• and
• a step of processing the insulator layer by single-batch exposure processing after forming the wiring layer.

A manufacturing method for a semiconductor device, in which a plurality of chips are separated from a wafer, the method comprising:

• a step of exposing photoresist on the wafer;
• and
• a step of developing the photoresist, wherein
• the step of exposing includes
• a first exposure shot in which a first partial pattern of a first chip, a second partial pattern of a second chip, and a scribe region pattern between the first chip and the second chip, are exposed on the photoresist, and
• a second exposure shot in which a third partial pattern of the second chip is exposed on the photoresist.