Data coherency algorithm to achieve bit-for-bit transmission

A method implemented by an actuator control electronics (ACE) device comprising a first lane and a second lane, the method comprising:

• receiving, by the first lane, first data associated with a first pattern;
• receiving, by the second lane, second data associated with a second pattern;
• receiving, by the first lane, the second pattern from the second lane;
• receiving, by the second lane, the first pattern from the first lane;
• comparing, by the first lane, the first pattern with the second pattern;
• comparing, by the second lane, the first pattern with the second pattern;
• based on a result of the comparing:
• selecting, by the first lane, first input data from a plurality of input data received by the first lane;
• generating, by the first lane, a first actuator command using the selected first input data;
• selecting, by the second lane, second input data from a plurality of input data received by the second lane;
• and
• generating, by the second lane, a second actuator command using the selected second input data, wherein the first actuator command and the second actuator command are bit-for-bit identical.

A flight control system comprising:

• a processor configured to receive input data;
• an actuator control electronics (ACE) device configured to be in communication with the processor, the ACE device comprises a first lane and a second lane;
• a remote electronic unit (REU) configured to be in communication with the ACE device;
• and
• an actuator configured to be in communication with the REU;
• the first lane of the ACE device is operable to:
• receive, from the processor, first data associated with a first pattern, wherein the first data is a first copy of the input data;
• receive, from the second lane, a second pattern associated with second data received at the second lane;
• compare the first pattern with the second pattern;
• and
• select, based on the comparison, first input data from a plurality of input data received by the first lane;
• generate a first actuator command using the selected first input data;
• and
• send the first actuator command to the REU;
• the second lane is operable to:
• receive, from the processor, the second data, wherein the second data is a second copy of the input data;
• receive the first pattern from the first lane;
• compare the first pattern with the second pattern;
• select, based on the comparison, second input data from a plurality of input data received by the second lane;
• generate a second actuator command using the selected second input data, wherein the first actuator command and the second actuator command are bit-for-bit identical;
• and
• send the second actuator command to the REU;
• the REU is operable to control the actuator using one of the first actuator command and the second actuator command.