Look-up table with input offsetting
AssigneeSambaNova Systems, Inc.
InventorsMingran WANG, Xiaoyan LI, Yongning SHENG
Life of this patent
Estimating the term…
Abstract
A computation unit computes a function f(I). The function f(I) has a target output range over a first domain of an input I encoded using a first format. A first circuit receives the encoded input I in the first format including X bits, to add an offset C to the encoded input I to generate an offset input SI=I+C, in a second format including fewer than X bits. The offset C is equal to a difference between the first domain in f(I) and a higher precision domain of the second format for the offset input SI. A second circuit is operatively coupled to receive the offset input SI in the second format, to output a value equal to a function f(SI) to provide an encoded output value f(I).
Claims27
A computation unit for a function f(I), the function f(I) having a target output range over a first domain of an input I encoded using a first format, comprising:
- a first circuit, receiving the encoded input I in the first format including X bits, to add an offset C to the encoded input I to generate an offset input SI=I+C, in a second format including fewer than X bits, the offset C being equal to a difference between the first domain in f(I) and a higher precision domain of the second format for the offset input SI;
- and
- a second circuit, operatively coupled to receive the offset input SI in the second format, to provide an encoded output value f(I).
A method for computing a function f(I), the function f(I) having a target output range over a first domain of an input I encoded using a first format, the method comprising:
- applying the encoded input I in the first format including X bits to a first circuit, to add an offset C to the encoded input I to generate an offset input SI=I+C, in a second format including fewer than X bits, the offset C being equal to a difference between the first domain in f(I) and a higher precision domain of the second format for the offset input SI;
- and
- applying the offset input SI in the second format to a second circuit, to provide an encoded output value f(I).
A reconfigurable data processor, comprising:
- a bus system;
- an array of configurable units connected to the bus system, configurable units in the array including configuration data stores to store configuration data to implement a computation unit for a function f(I), the function f(I) having a target output range over a first domain of an input I encoded using a first format, the computation unit comprising:
- a first circuit, receiving the encoded input I in the first format including X bits, to add an offset C to the encoded input I to generate an offset input SI=I+C, in a second format including fewer than X bits, the offset C being equal to a difference between the first domain in f(I) and a higher precision domain of the second format for the offset input SI;
- and
- a second circuit, operatively coupled to receive the offset input SI in the second format, to output a value equal to a function f(SI-C) to provide an encoded output value f(I).
Dependencies are inferred from the claim text.